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PDF IRS20954S Data sheet ( Hoja de datos )
| Número de pieza | IRS20954S | |
| Descripción | Protected Digital Audio Driver | |
| Fabricantes | International Rectifier | |
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Data Sheet No. PD60276
IRS20954S
Protected Digital Audio Driver
Features
• Floating PWM input enables easy half bridge
implementation
• Integrated programmable bi-directional over-current
protection with self-reset function
• Programmable compensated preset deadtime for
improved THD performances
• High noise immunity
• ±100 V high voltage ratings deliver up to 500 W output
power
• 3.3 V / 5 V logic compatible input
• Operates up to 800 kHz
• RoHS compliant
Product Summary
VOFFSET (max)
Gate driver
Io+
Io -
Selectable Deadtime
Propagation delay
OC protection delay
± 100 V
1.0 A
1.2 A
15 ns, 25 ns,
35 ns, 45 ns
90 ns
1 µs (max)
Description
The IRS20954 is a high voltage, high speed MOSFET driver
with floating PWM input, specially designed for Class D audio
amplifier applications. The bi-directional current sensing
requires no external shunt resistors. It can capture over-current
conditions at either positive or negative load current direction. A
built-in control block provides secure protection sequence
against over-current conditions, including a programmable reset
timer. The internal deadtime generation block provides
accurate gate switch timing and enables optimum deadtime
settings for better audio performances, such as THD and audio
noise floor.
Package
16-Lead SOIC (narrow body)
Typical Connection
PWM
(Please refer to Lead
Assignments for correct
pin configuration. This
diagram shows
electrical connections
only)
IRS 20954 S
VDD
CSH
CSD
VB
IN HO
VSS
VS
NC
VREF
NC
VCC
OCSET
LO
DT COM
+B
Speaker
Vcc
12 V
-B
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1 page  
IRS20954S
Electrical Characteristics (cont.)
Symbol
VDT1
VDT2
VDT3
Definition
DT mode select threshold 2
DT mode select threshold 3
DT mode select threshold 4
Min.
0.51·(Vcc)
0.32·(V cc)
0.21·(V cc)
Typ.
0.57·(V cc)
0.36·(V cc)
0.23·(V cc)
Max.
0.63·(V cc)
0.40·(V cc)
0.25·(Vv
Units
V
Test Conditions
Lead Definitions
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Symbol
Description
VDD
CSD
IN
VSS
NC
VREF
OCSET
DT
COM
LO
VCC
NC
VS
HO
VB
CSH
Floating input positive supply
Shutdown timing capacitor, referenced to VSS
PWM non-inverting input, in phase with HO
Floating input supply return
5 V reference output for setting OCSET
Low-side over-current threshold setting, referenced to COM
Input for programmable deadtime, referenced to COM
Low-side supply return
Low-side output
Low-side logic supply
High-side floating supply return
High-side output
High-side floating supply
High-side over-current sensing input, referenced to VS
VDD 1
CSD 2
IN 3
VSS 4
NC 5
VREF 6
OCSET 7
DT 8
20954
16 CSH
15 VB
14 HO
13 VS
12 NC
11 VCC
10 LO
9 COM
IRS20954 16 Lead SOIC (narrow body)
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5
5 Page 
IRS20954S
Self Reset Protection
By simply putting a capacitor between the CSD and VSS, the OCP in the IRS20954 acts as a self.
VDD
CSH
CSD
VB
IN
Ct VSS
NC
HO
VS
NC
VREF
VCC
OCSET
DT
LO
COM
Figure 8: Self-Reset Protection Configuration
Designing Ct
Timing capacitor Ct programs the protection resume interval timing tPR given as:
t PR
=
1.1⋅
Ct
I
⋅VDD
CSD
[sec]
or
Ct
=
tPR ⋅ I CSD
1.1⋅VDD
[F]
For example, tPR is 1.2 s with a 10 µF capacitor for VDD=10.8 V. The start-up time tSU, from power-up to
shutdown release, is given as:
t SU
=
0.7
⋅
Ct
I
⋅VDD
CSD
[sec]
or
Ct
=
tSU ⋅ I CSD
0.7 ⋅VDD
[F]
where ICSD is charge/discharge current in CSD pin, 100 µA.
VDD is supply voltage respect to VSS.
Protection-resume timing tPR should be long enough to avoid over heating and failure of the MOSFET from
the repetitive sequences of shutdown and resume when the load is in continuous short circuit. In most of
applications, the minimum recommended protection-resume timing tPR is 0.1 s.
Shutdown Input
By externally discharging Ct down to below Vth2, for example with a transistor shown in Fig. 9, the IRS20954 enters
shutdown mode. The operation resumes when the voltage of CSD pin comes back and cross the upper threshold of
CSD, Vth1, by its charging process.
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| Páginas | Total 25 Páginas | |
| PDF Descargar | [ Datasheet IRS20954S.PDF ] | |
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