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PDF MT5C6405 Data sheet ( Hoja de datos )
| Número de pieza | MT5C6405 | |
| Descripción | 16K x 4 SRAM SRAM MEMORY ARRAY | |
| Fabricantes | ASI | |
| Logotipo |  |
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Austin Semiconductor, Inc.
SRAM
MT5C6405
16K x 4 SRAM
SRAM MEMORY ARRAY
AVAILABLE AS MILITARY
SPECIFICATIONS
• SMD 5962-86859
• MIL-STD-883
FEATURES
• High Speed: 12, 15, 20, 25, 35, 45, 55, and 70ns
• Battery Backup: 2V data retention
• High-performance, low-power CMOS double-metal
process
• Single +5V (+10%) Power Supply
• Easy memory expansion with CE\
• All inputs and outputs are TTL compatible
OPTIONS
• Timing
12ns access
15ns access
20ns access
25ns access
35ns access
45ns access
55ns access
70ns access
MARKING
-12
-15
-20
-25
-35
-45*
-55*
-70*
• Package(s)
Ceramic DIP (300 mil)
Ceramic LCC
C No. 106
E C No. 204
• Operating Temperature Ranges
Industrial (-40oC to +85oC)
IT
Military (-55oC to +125oC)
XT
• 2V data retention/low power L
*Electrical characteristics identical to those provided for the 35ns
access devices.
For more products and information
please visit our web site at
www.austinsemiconductor.com
PIN ASSIGNMENT
(Top View)
24-Pin DIP (C)
(300 MIL)
A5 1
A6 2
A7 3
A8 4
A9 5
A10 6
A11 7
A12 8
A13 9
CE\ 10
OE\ 11
Vss 12
24 Vcc
23 A4
22 A3
21 A2
20 A1
19 A0
18 NC
17 DQ4
16 DQ3
15 DQ2
14 DQ1
13 WE\
28-Pin LCC (EC)
A6 4
A7 5
A8 6
A9 7
A10 8
A11 9
A12 10
A13 11
CE\ 12
3 2 1 28 27
26 NC
25 A4
24 A3
23 A2
22 A1
21 A0
20 DQ4
19 DQ3
18 DQ2
13 14 15 16 17
GENERAL DESCRIPTION
The Austin Semiconductor SRAM family employs
high-speed, low-power CMOS designs using a four-transistor
memory cell. Austin Semiconductor SRAMs are fabricated
using double-layer metal, double-layer polysilicon
technology.
For flexibility in high-speed memory applications, Austin
Semiconductor offers chip enable (CE\) and output enable
(OE\) capability. These enhancements can place the outputs
in High-Z for additional flexibility in system design.
Writing to these devices is accomplished when write
enable (WE\) and CE\ inputs are both LOW. Reading is
accomplished when WE\ remains HIGH and CE\ and OE\ go
LOW. The device offers a reduced power standby mode when
disabled. This allows system designs to achieve low standby
power requirements.
All devices operate from a single +5V power supply and
all inputs and outputs are fully TTL compatible.
MT5C6405
Rev. 2.0 5/01
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
1
1 page  
Austin Semiconductor, Inc.
ACTEST CONDITIONS
Input pulse levels ...................................... Vss to 3.0V
Input rise and fall times ......................................... 5ns
Input timing reference levels ................................ 1.5V
Output reference levels ....................................... 1.5V
Output load ................................. See Figures 1 and 2
Q
255
SRAM
MT5C6405
+5V
480
30pF
Q
255
+5V
480
5 pF
Fig. 1 Output Load
Equivalent
Fig. 2 Output Load
Equivalent
NOTES
1. All voltages referenced to VSS (GND).
2. -3V for pulse width < 20ns
3. ICC is dependent on output loading and cycle rates.
The specified value applies with the outputs
unloaded, and f = 1 Hz.
tRC (MIN)
4. This parameter is guaranteed but not tested.
5. Test conditions as specified with the output loading
as shown in Fig. 1 unless otherwise noted.
6. tHZCE, tHZOE and tHZWE are specified with CL = 5pF as
in Fig. 2. Transition is measured ±200mV typical from
steady state voltage, allowing for actual tester RC time
constant.
7. At any given temperature and voltage condition,
tHZCE is less than tLZCE, and tHZWE is less than tLZWE.
8. WE\ is HIGH for READ cycle.
9. Device is continuously selected. Chip enables and
output enables are held in their active state.
10. Address valid prior to, or coincident with, latest
occurring chip enable.
11. tRC = Read Cycle Time.
12. CE2 timing is the same as CE1\ timing. The waveform
is inverted.
DATA RETENTION ELECTRICAL CHARACTERISTICS (L Version Only)
DESCRIPTION
CONDITIONS
SYM MIN MAX UNITS NOTES
VCC for Retention Data
VDR
2
---
V
Data Retention Current
Chip Deselect to Data
Retention Time
Operation Recovery Time
CE\ > (VCC - 0.2V)
VIN > (VCC - 0.2V)
or < 0.2V
VCC = 2V ICCDR
tCDR
tR
0
tRC
1
---
mA
ns 4
ns 4, 11
MT5C6405
Rev. 2.0 5/01
LOW Vcc DATA RETENTION WAVEFORM
VCC
tCDR
CE\
VIH
VIL
111122223333444455556666777788889999
DATA RETENTION MODE
4.5V
VDR > 2V
4.5V
VDR
tR
111122223333444455556666111177772111122288883222233343343344
111122223333DON’T CARE
1111222233334444UNDEFINED
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
5
5 Page 
Austin Semiconductor, Inc.
SRAM
MT5C6405
ASI TO DSCC PART NUMBER
CROSS REFERENCE*
ASI Package Designator C
ASI Part #
MT5C6805C-35/883C
MT5C6805C-35L/883C
MT5C6805C-45/883C
MT5C6805C-45L/883C
MT5C6805C-55/883C
MT5C6805C-55L/883C
MT5C6805C-70/883C
MT5C6805C-70L/883C
SMD Part #
5962-8685918LA
5962-8685917LA
5962-8685916LA
5962-8685915LA
5962-8685914LA
5962-8685913LA
5962-8685912LA
5962-8685911LA
ASI Package Designator EC
ASI Part #
MT5C6805EC-35/883C
MT5C6805EC-35L/883C
MT5C6805EC-45/883C
MT5C6805EC-45L/883C
MT5C6805EC-55/883C
MT5C6805EC-55L/883C
MT5C6805EC-70/883C
MT5C6805EC-70L/883C
SMD Part #
5962-8685918UA
5962-8685917UA
5962-8685916UA
5962-8685915UA
5962-8685914UA
5962-8685913UA
5962-8685912UA
5962-8685911UA
* ASI part number is for reference only. Orders received referencing the SMD part number will be processed per the SMD.
MT5C6405
Rev. 2.0 5/01
11
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet MT5C6405.PDF ] | |
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