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NTMD3N08LR2 Schematic ( PDF Datasheet ) - ON Semiconductor

Teilenummer NTMD3N08LR2
Beschreibung Power MOSFET
Hersteller ON Semiconductor
Logo ON Semiconductor Logo 



Gesamt 12 Seiten
		
NTMD3N08LR2 Datasheet, Funktion
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NTMD3N08LR2
Advance Information
Power MOSFET
2.3 Amps, 80 Volts
N–Channel Enhancement–Mode
SO–8 Dual Package
Features
Ultra Low On–Resistance Provides Higher Efficiency
RDS(on) = 0.215 W, VGS = 10 V
RDS(on) = 0.245 W, VGS = 5.0 V
Low Reverse Recovery Losses
Internal RG = 50 W
Designed for Power Management Solutions in 42 V Automotive
System Applications
IDSS and RDS(on) Specified at Elevated Temperature
Avalanche Energy Specified
Miniature SO–8 Surface Mount Package – Saves Board Space
Mounting Information for SO–8 Package Provided
Applications
Integrated Starter Alternator
Electronic Power Steering
Electronic Fuel Injection
Catalytic Converter Heaters
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol Value
Unit
Drain–to–Source Voltage
Drain–to–Source Voltage (RGS = 1.0 mW)
Gate–to–Source Voltage – Continuous
Gate–to–Source Voltage –
Non–Repetitive (tp 10 ms)
Continuous Drain Current @ TA = 25°C
Pulsed Drain Current (Note 1)
Total Power Dissipation @ TA = 25°C (Note 2)
Operating and Storage Temperature Range
VDSS
VDGR
VGS
VGSM
ID
IDM
PD
TJ, Tstg
80
80
±15
±20
2.3
25
3.1
–55 to
+175
V
V
A
W
°C
Single Pulse Drain–to–Source Avalanche
Energy – Starting TJ = 25°C (VDD = 50 Vdc,
VGS = 5.0 Vdc, Peak IL = 7.0 Apk,
L = 1.0 mH, RG = 25 W)
Thermal Resistance –
Junction–to–Ambient (Note 2)
EAS
RqJA
25 mJ
48 °C/W
Maximum Lead Temperature for Soldering TL 260 °C
Purposes for 10 Seconds
1. Pulse Test: Pulse Width = 10 ms, Duty Cycle = 2%
2. Mounted onto a 2square FR–4 board (1sq. oz. Cu 0.06thick single sided),
t 5 seconds
This document contains information on a new product. Specifications and information
herein are subject to change without notice.
http://onsemi.com
2.3 AMPERES
80 VOLTS
215 m@ VGS = 5 V (Typ)
DUAL SO–8
CASE 751
STYLE 11
MARKING DIAGRAM
& PIN ASSIGNMENT
Source 1 1
8
Drain 1
Gate 1 2
3N08
7
Drain 1
3
Source 2
AYWW
6
Drain 2
4
Gate 2
5
Drain 2
(Top View)
3N08
A
Y
WW
= Specific Device Code
= Assembly Location
= Year
= Work Week
ORDERING INFORMATION
Device
Package
Shipping
NTMD3N08LR2
SO–8 2500/Tape & Reel
© Semiconductor Components Industries, LLC, 2002
August, 2002 – Rev. 2
1
Publication Order Number:
NTMD3N08LR2/D






NTMD3N08LR2 Datasheet, Funktion
NTMD3N08LR2
SAFE OPERATING AREA
The Forward Biased Safe Operating Area curves define
the maximum simultaneous drain–to–source voltage and
drain current that a transistor can handle safely when it is
forward biased. Curves are based upon maximum peak
junction temperature and a case temperature (TC) of 25°C.
Peak repetitive pulsed power limits are determined by using
the thermal response data in conjunction with the procedures
discussed in AN569, “Transient Thermal Resistance –
General Data and Its Use.”
Switching between the off–state and the on–state may
traverse any load line provided neither rated peak current
(IDM) nor rated voltage (VDSS) is exceeded, and that the
transition time (tr, tf) does not exceed 10 µs. In addition the
total power averaged over a complete switching cycle must
not exceed (TJ(MAX) – TC)/(RθJC).
A power MOSFET designated E–FET can be safely used
in switching circuits with unclamped inductive loads. For
reliable operation, the stored energy from circuit inductance
dissipated in the transistor while in avalanche must be less
than the rated limit and must be adjusted for operating
conditions differing from those specified. Although industry
practice is to rate in terms of energy, avalanche energy
capability is not a constant. The energy rating decreases
non–linearly with an increase of peak current in avalanche
and peak junction temperature.
100
VGS = 20 V
SINGLE PULSE
TC = 25°C
10
1
10 ms
100 µs
1 ms
10 ms
25
20
15
10
ID = 2.3 A
0.1
0.01
0.1
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
dc
1 10 100
VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
5
0
25
50
75 100 125 150 175
TJ, STARTING JUNCTION TEMPERATURE (_C)
Figure 12. Maximum Avalanche Energy versus
Starting Junction Temperature
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NTMD3N08LR2 pdf, datenblatt
NTMD3N08LR2
Thermal Clad is a registered trademark of the Bergquist Company.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make
changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any
particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all
liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death
may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
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Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada
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2–9–1 Kamimeguro, Meguro–ku, Tokyo, Japan 153–0051
Phone: 81–3–5773–3850
Email: r14525@onsemi.com
ON Semiconductor Website: http://onsemi.com
For additional information, please contact your local
Sales Representative.
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