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PDF MCP73833 Data sheet ( Hoja de datos )
| Número de pieza | MCP73833 | |
| Descripción | (MCP73833 / MCP73834) Microcontrollers | |
| Fabricantes | Microchip Technology | |
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MCP73833/4
Stand-Alone Linear Li-Ion / Li-Polymer Charge
Management Controller
Features
• Complete Linear Charge Management Controller
- Integrated Pass Transistor
- Integrated Current Sense
- Integrated Reverse Discharge Protection
• Constant Current / Constant Voltage Operation
with Thermal Regulation
• High Accuracy Preset Voltage Regulation:
- 4.2V, 4.35V, 4.4V, or 4.5V, + 0.75%
• Programmable Charge Current: 1A Maximum
• Preconditioning of Deeply Depleted Cells
- Selectable Current Ratio
- Selectable Voltage Threshold
• Automatic End-of-Charge Control
- Selectable Current Threshold
- Selectable Safety Time Period
• Automatic Recharge
- Selectable Voltage Threshold
• Two Charge Status Outputs
• Cell Temperature Monitor
• Low-Dropout Linear Regulator Mode
• Automatic Power-Down when Input Power
Removed
• Under Voltage Lockout
• Numerous Selectable Options Available for a
Variety of Applications:
- Refer to Section 1.0 “Electrical
Characteristics” for Selectable Options
- Refer to the Product Identification System for
Standard Options
• Available Packages:
- DFN-10 (3 mm x 3 mm)
- MSOP-10
Applications
• Lithium-Ion / Lithium-Polymer Battery Chargers
• Personal Data Assistants
• Cellular Telephones
• Digital Cameras
• MP3 Players
• Bluetooth Headsets
• USB Chargers
Description
The MCP73833/4 is a highly advanced linear charge
management controller for use in space-limited, cost
sensitive applications. The MCP73833/4 is available in
a 10-Lead, 3 mm x 3 mm DFN package or a 10-Lead,
MSOP package. Along with its small physical size, the
low number of external components required makes
the MCP73833/4 ideally suited for portable
applications. For applications charging from a USB
port, the MCP73833/4 can adhere to all the
specifications governing the USB power bus.
The MCP73833/4 employs a constant current/constant
voltage charge algorithm with selectable precondition-
ing and charge termination. The constant voltage
regulation is fixed with four available options: 4.20V,
4.35V, 4.40V, or 4.50V, to accomodate new, emerging
battery charging requirements. The constant current
value is set with one external resistor. The MCP73833/
4 limits the charge current based on die temperature
during high power or high ambient conditions. This
thermal regulation optimizes the charge cycle time
while maintaining device reliability.
Several options are available for the preconditioning
threshold, preconditioning current value, charge
termination value, and automatic recharge threshold.
The preconditioning value and charge termination
value are set as a ratio, or percentage, of the
programmed constant current value. Preconditioning
can be set to 100%. Refer to Section 1.0 “Electrical
Characteristics” for available options and the
“Product Indentification System” for standard
options.
The MCP73833/4 is fully specified over the ambient
temperature range of -40°C to +85°C.
Package Types
DFN-10
MSOP-10
VDD 1
VDD 2
STAT1 3
STAT2 4
VSS 5
VDD
VDD
STAT1
STAT2
1
2
3
4
10 VBAT
9 VBAT
EP
11
8 THERM
7 PG(TE)
6 PROG
10 VBAT
9 VBAT
8 THERM
7 PG(TE)
VSS 5
6 PROG
© 2009 Microchip Technology Inc.
DS22005B-page 1
1 page  
MCP73833/4
DC CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise specified, all limits apply for VDD= [VREG(Typical)+0.3V] to 6V, TA=-40°C to 85°C.
Typical values are at +25°C, VDD= [VREG(Typical)+1.0V]
Parameters
Sym
Min Typ Max Units
Conditions
Automatic Power Down
Automatic Power Down Entry
Threshold
Automatic Power Down Exit Thresh-
old
Timer Enable Input (TE)
Input High Voltage Level
Input Low Voltage Level
Input Leakage Current
Thermal Shutdown
Die Temperature
Die Temperature Hysteresis
VPD
VPDEXIT
VIH
VIL
ILK
TSD
TSDHYS
— VBAT + —
50 mV
— VBAT + —
150 mV
2.0 — —
— — 0.6
— 0.01 1
— 150 —
— 10 —
V 2.3V < VBAT < VREG
VDD Falling
V 2.3V < VBAT < VREG
VDD Rising
V
V
µA VTE = 6V
°C
°C
AC CHARACTERISTICS
Electrical Specifications: Unless otherwise specified, all limits apply for VDD= [VREG(Typical)+0.3V] to 6V, TA=-40°C to 85°C.
Typical values are at +25°C, VDD= [VREG(Typical)+1.0V]
Parameters
Sym
Min Typ Max Units
Conditions
UVLO Start Delay
Current Regulation
Transition Time Out of Preconditioning
Current Rise Time Out of Preconditioning
Preconditioning Comparator Filter Time
Termination Comparator Filter Time
Charge Comparator Filter Time
Thermistor Comparator Filter Time
Elapsed Timer
Elapsed Timer Period
Status Indicators
Status Output turn-off
Status Output turn-on
tSTART
tDELAY
tRISE
tPRECON
tTERM
tCHARGE
tTHERM
tELAPSED
—
—
—
0.4
0.4
0.4
0.4
0
3.6
5.4
7.2
tOFF
tON
—
—
—5
—1
—1
1.3 3.2
1.3 3.2
1.3 3.2
1.3 3.2
ms VDD Low-to-High
ms VBAT<VPTH to VBAT>VPTH
ms IOUT Rising to 90% of IREG
ms Average VBAT Rise/Fall
ms Average IOUT Falling
ms Average VBAT Falling
ms Average THERM Rise/Fall
0 0 Hours Timer Disabled
4.0 4.4 Hours
6.0 6.6 Hours
8.0 8.8 Hours
— 200
— 200
µs ISINK = 1 mA to 0 mA
µs ISINK = 0 mA to 1 mA
TEMPERATURE SPECIFICATIONS
Electrical Specifications: Unless otherwise specified, all limits apply for VDD= [VREG(Typical)+0.3V] to 6V.
Typical values are at +25°C, VDD= [VREG(Typical)+1.0V]
Parameters
Symbol Min Typ Max Units
Conditions
Temperature Ranges
Specified Temperature Range
Operating Temperature Range
Storage Temperature Range
Thermal Package Resistances
TA -40 — +85 °C
TA -40 — +125 °C
TA -65 — +150 °C
Thermal Resistance, MSOP-10
θJA — 113 — °C/W 4-Layer JC51-7 Standard
Board, Natural Convection
Thermal Resistance, DFN-10, 3 mm x 3 mm
θJA
— 41
— °C/W 4-Layer JC51-7 Standard
Board, Natural Convection
© 2009 Microchip Technology Inc.
DS22005B-page 5
5 Page 
MCP73833/4
3.0 PIN DESCRIPTIONS
Descriptions of the pins are listed in Table 3-1.
TABLE 3-1: PIN FUNCTION TABLE
Pin No.
DFN-10 MSOP-10
Symbol
Function
11
22
33
44
55
66
77
88
99
10 10
11 —
VDD
VDD
STAT1
STAT2
VSS
PROG
PG, TE
THERM
VBAT
VBAT
EP
Battery Management Input Supply
Battery Management Input Supply
Charge Status Output
Charge Status Output
Battery Management 0V Reference
Current Regulation Set and Charge Control Enable
MCP73833: Power Good output, MCP73834: Timer Enable input
Thermistor input
Battery Charge Control Output
Battery Charge Control Output
Exposed Thermal Pad (EP); must be connected to VSS.
3.1 Battery Management Input Supply
(VDD)
A supply voltage of [VREG (typical) + 0.3V] to 6V is
recommended. Bypass to VSS with a minimum of 1 µF.
3.2 Charge Status Outputs (STAT1,
STAT2)
STAT1 and STAT2 are open-drain logic outputs for con-
nection to a LED for charge status indication.
Alternatively, a pull-up resistor can be applied for
interfacing to a host microcontroller.
3.3 Battery Management 0V Reference
(VSS)
Connect to negative terminal of battery and input
supply.
3.4 Current Regulation Set (PROG)
Preconditioning, fast charge, and termination currents
are scaled by placing a resistor from PROG to VSS.
The charge management controller can be disabled by
allowing the PROG input to float.
3.5 Power Good Indication (PG)
MCP73833 Only
The power good (PG) option is a pseudo open-drain
output. The PG output can sink current, but not source
current. However, there is a diode path back to the
input, and, as such, the PG output should only be
pulled up to the input. The PG output is low whenever
the input to the MCP73833 is above the UVLO
threshold and greater than the battery voltage.
3.6 Timer Enable Input (TE)
MCP73834 Only
The timer enable (TE) input option is used to enable or
disable the internal timer. A low signal on this pin
enables the internal timer and a high signal disables
the internal timer. The TE input can be used to disable
the timer when the charger is supplying current to
charge the battery and power the system load. The TE
input is compatible with 1.8V logic.
3.7 Thermistor Input (THERM)
An internal 50 µA current source provides the bias for
most common 10 kΩ negative-temperature coefficient
thermistors (NTC). The MCP73833/4 compares the
voltage at the THERM pin to factory set thersholds of
1.20V and 0.25V, typically.
3.8 Battery Charge Control Output
(VBAT)
Connect to positive terminal of battery. Drain terminal
of internal P-channel MOSFET pass transistor. Bypass
to VSS with a minimum of 1 µF to ensure loop stability
when the battery is disconnected.
3.9 Exposed Thermal Pad (EP)
There is an internal electrical connection between the
Exposed Thermal Pad (EP) and the VSS pin; they must
be connected to the same potential.
© 2009 Microchip Technology Inc.
DS22005B-page 11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MCP73833.PDF ] | |
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