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PDF STCCP27A Data sheet ( Hoja de datos )
| Número de pieza | STCCP27A | |
| Descripción | High speed dual differential line receivers | |
| Fabricantes | ST Microelectronics | |
| Logotipo |  |
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STCCP27A
1.8V/2.8V High speed dual differential line receivers,
Compact camera port decoder, I2C control line
Feature summary
s SUB-Low voltage differential signaling inputs:
VID = 100mV with RT = 100Ω, CL =10pF
s High signaling rate:
fIN = 416MHz max (D+,D-, CLK+, CLK-)
fOUT = 52MHz max (D1-D8, CLK)
s Very high speed:
tpLH~tpHL=3.5ns (typ) at VDD=2.8V; VL=1.8V
s Operating voltage range:
VDD(OPR) = 2.65V to 3.6V
VL(OPR) =1.65V to 1.95V
s Symmetrical output impedance
(D1-D8, H-SYNC, V-SYNC, CLK):
IIOHI=IOL=8mA (min) at VDD=2.65V;VL=1.8V
s Low power dissipation
(Disabled: EN=Gnd):
ISOFF = IDD + IL = 10µA (max)
s CMOS logic input threshold
(EN, SYNC_SEL):
VIL = 0.3xVDD; VDD =2.65V to 3.6V
VIH = 0.7xVDD; VDD =2.65V to 3.6V
s Bidirectional level translator line
(I/OVDD, I/OVL) for I2C communications:
400kHz max frequency
IIOHI= 20µA (min.) at VDD=2.8V;VL=1.8V
IOL = 1 mA (min.) at VDD=2.8V;VL=1.8V
s 3.6V Tolerant on inputs (EN, SYNC_SEL)
s Leadfree µTFBGA package
(RoHS restriction of hazardous substances)
µTFBGA25
.
Description
The STCCP27A receiver converts the subLVDS
clock/datastream (up to 416 Mbps throughput
bandwidth) back into parallel 8 bits of CMOS/
LVTTL. The device recognizes the CCP 32bit
start of frame (SOF), end of frame (EOF), start of
line (SOL) and end of line (EOL) sequences to
generate the H-SYNC and V-SYNC signals.
Output LVTTL clock (up to 52 MHz) is transmitted
in parallel with data. Input and Output data are
rising edge strobe. This chipset is an ideal means
to link mobile camera modules to baseband
processors. In order to minimize static current
consumption, it is possible to shut down the
device when the interface is not being used by a
power-down (EN) pin that reduces to 10µA the
Maximum Current Consumption making this
device ideal for portable applications like Mobile
Phone, Portable Battery Equipment. Two
dedicated I2C lines are provided to translate
bidirectional controls from camera and µC
devices. The STCCP27A is offered in a µTFBGA
package to optimize PCB space. All inputs and
outputs are equipped with protection circuits
against static discharge, giving them ESD
immunity from transient excess voltage. The
STCCP27A is characterized for operation over
the commercial temperature range -40°C to 85°C.
Order code
Part number
STCCP27ATBR
April 2006
Temperature
Range
-40 to 85 °C
Package
µTFBGA25 3x3mm (Tape & Reel)
Rev. 1
Comments
3000 parts per reel
1/19
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STCCP27A
2 Pin configuration
Pin configuration
Figure 4. Pin configuration (top through view - bumps are on the other side)
Table 1.
Pin n°
D5
E5
D4
E4
D2
E2
D1
E1
A2, A1
A5, A4
B3
D3
C3
B2
A3, E3
C5
B4
C1
B1, C2
B5, C4
Pin description
Symbol
D1
D2
D3
D4
D5
D6
D7
D8
D+, D-
CLK+, CLK-
EN
CLK
H-SYNC
V-SYNC
GND
VDD
SYNC SEL
VL
I/OVL1, I/OVL2
I/OVDD1, I/OVDD2
Name and function
Decoder Output (LSB)
Decoder Output
Decoder Output
Decoder Output
Decoder Output
Decoder Output
Decoder Output
Decoder Output (MSB)
Differential Data Receiver Inputs
Differential CLK Receiver Inputs
Receivers Enable Input
Clock Output
Horizontal Sync Output
Vertical Sync Output
Ground
Main Supply Voltage
Select Sync Input
Secondary Supply Voltage
I2C Line (VL Referred)
I2C Line (VDD Referred)
5/19
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STCCP27A
Timing diagram
Figure 8. Disabled sync mode free running clock IN (SYNC_SEL=GND) (D1-D8 will get out input
data DIN, including sync code)
11/19
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| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet STCCP27A.PDF ] | |
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