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VG2617400D Schematic ( PDF Datasheet ) - Vanguard International Semiconductor

Teilenummer VG2617400D
Beschreibung CMOS DRAM
Hersteller Vanguard International Semiconductor
Logo Vanguard International Semiconductor Logo 




Gesamt 25 Seiten
VG2617400D Datasheet, Funktion
www.DataSheet4U.com
VIS
VG26(V)(S)17400D
4,194,304 x 4 - Bit
CMOS Dynamic RAM
Description
The device is CMOS Dynamic RAM organized as 4,194,304 words x 4 bits. It is fabricated with an
advanced submicron CMOS technology and designed to operate from a single 5V only or 3.3V only power
supply. Low voltage operation is more suitable to be used on battery backup, portable electronic application.
A new refresh feature called “ self-refresh “ is supported and very slow CBR cycles are being performed. It is
packaged in JEDEC standard 26/24 - pin plastic SOJ or TSOP (II).
Features
• Single 5V (±10 %) or 3.3V (±10 %) only power supply
• High speed tRAC access time : 50/60 ns
• Low power dissipation
- Active mode : 5V version 605/550 mW (Max.)
3.3V version 396/360 mW (Max.)
- Standby mode : 5V version 1.375 mW (Max.)
3.3V version 0.54 mW (Max.)
• Fast Page Mode access
• I/O level : TTL compatible (Vcc = 5V)
LVTTL compatible (Vcc = 3.3V)
DataSheet4U.com
• 2048 refresh cycles in 32 ms (Std) or 128ms (S - version)
• 4 refresh mode :
- RAS only refresh
- CAS-before-RAS refresh
- Hidden refresh
- Self - refresh (S - version)
DataShee
DataSheet4U.com
DataShDeoectu4mUen.ct:o1Gm5-0126
Rev.1
Page 1






VG2617400D Datasheet, Funktion
www.DataSheet4U.com
VIS
VG26(V)(S)17400D
4,194,304 x 4 - Bit
CMOS Dynamic RAM
et4U.com
DC Characteristics; 5 - Volt verion
(Ta= 0 to 70°C, VCC = + 5V±10%, Vss = 0V)
VG26 (V) (S) 17400D
Parameter
Symbol
Test Conditions
-5 -6
Unit Notes
Min Max Min Max
Operating
current
RAS cycling
ICC1 CAS cycling
tRC = min.
- 110 - 100 mA 1, 2
Low
power
S - version
TTL interface
RAS, CAS = VIH
Dout = high - Z
-2 -2
mA
Standby Standard
Current power
version
CMOS interface
RAS, CAS VCC - 0.2V
Dout = high - Z
ICC2 TTL interface
RAS, CAS = VIH
Dout = high - Z
- 0.25
- 0.25
mA
-2 -2
mA
CMOS interface
RAS, CAS VCC - 0.2V
Dout = high - Z
-1 -1
mA
RAS - only
refresh current
ICC3 RAS cycling, CAS = VIH
tRC = min.
- 110
- 100
1, 2
mA
Fast page mode
current
ICC4
tPC = min.
DataSheet4U.com - 80
- 70
1,3
mA
CAS - before - RAS
refresh current
ICC5 tRC = min.
RAS, CAS cycling
- 110
- 100
1, 2
mA
Self - refresh currant
(S - Version)
ICC8 tRASS 100µS
- 350
- 350 µA
CAS - before - RAS
long refresh
current (S - Version)
ICC9 Standby : VCC - 0.2V RAS
CAS before RAS refresh :
2048 cycles/128ms
RAS, RAS : 0V VIL 0.2V
VCC - 0.2V VIH VIH (Max)
Dout = high - Z, tRAS 300ns
- 500
- 500 µA
DataShee
DataSheet4U.com
DaatSheet Docu4mUenc.omt:1G5-0126
Rev.1
Page 6

6 Page









VG2617400D pdf, datenblatt
www.DataSheet4U.com
VIS
VG26(V)(S)17400D
4,194,304 x 4 - Bit
CMOS Dynamic RAM
et4U.com
Refresh Cycle
VG26 (V) (S) 17400D
Parameter
Symbol
-5
Min Max
-6
Min Max
Unit
CAS setup time (CBR refresh)
tCSR
10 - 10 - ns
CAS hold time (CBR refresh)
RAS precharge to CAS hold time
tCHR
tRPC
10 - 10 - ns
5 - 5 - ns
RAS pulse width (self refresh)
RAS precharge time (self refresh)
CAS hold time (CBR self refresh)
WE setup time
tRASS
tRPS
tCHS
tWSR
100
90
-50
0
- 100
- 110
- -50
-0
- µs
- ns
- ns
- ns
WE hold time
Fast Page Mode Cycle
tWHR
10 - 10 - ns
VG26 (V) (S) 17400D
Parameter
Symbol
-5
Min Max
-6
Min Max
Unit
Fast page mode cycle time
Fast page mode CAS Precharge time
tPC 35 - 40 - ns
tCP 10 - 10 - ns
Fast page mode RAS pulse width
Access time from CAS precharge
RAS hold time from CAS precharge
Fast Page Mode Read Modify Write Cycle
tRASP
50 105
DtaCtPaASheet4U.co- m 30
tCPRH 30 -
60 105 ns
- 35 ns
35 - ns
VG26 (V) (S) 17400D
Parameter
Symbol
-5
Min Max
-6
Min Max
Unit
Fast page mode read - modify - write cycle CAS
precharge to WE delay time
tCPW
45 - 55 - ns
Fast page mode read - modify - write cycle time tPRWC 70 - 80 - ns
Notes
10
7
Notes
20
10,14
Notes
11
DataShee
DataSheet4U.com
DataShDeoectu4mUen.ct:o1mG5-0126
Rev.1
Page 12

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