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KS0718 Schematic ( PDF Datasheet ) - Samsung semiconductor

Teilenummer KS0718
Beschreibung 81 COM / 104 SEG DRIVER & CONTROLLER FOR STN LCD
Hersteller Samsung semiconductor
Logo Samsung semiconductor Logo 




Gesamt 30 Seiten
KS0718 Datasheet, Funktion
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KS0718
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81 COM / 104 SEG DRIVER & CONTROLLER FOR STN LCD
DataShee
August. 1999.
Ver. 1.4
Prepared by:
Chan-Young, Jeong
Contents in this document are subject to change without notice. No part of this document may be reproduced
or transmitted in any form or by any means, electronic or mechanical, for any purpose, without the express
written permission of LCD Driver IC Team.
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KS0718 Datasheet, Funktion
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KS0718
SPEC. VER. 1.4
PAD CONFIGURATION
81 COM / 104 SEG DRIVER & CONTROLLER FOR STN LCD
et4U.com
242 113
243 ðð ððððððððððððððððððð - - - - - - - - - - ððððððððððððððððððð ðð 112
Y
KS0718
(TOP VIEW, PADS UP)
(0,0)
X
274 ðððððððððððððððððððððð - - - - - - - - - - ððððððððððððððððððððððð 81
1 80
Figure 2. KS0718 Chip Configuration
Table 1. KS0718 Pad Dimensions
Item
Pad No.
Size
XY
Chip size
Pad pitch
Bumped pad size (Max.)
Bumped pad height
-
8350
2380
1 to 80
8D2attoaS1h1e0et4U.com
90
115 to 240
60
245 to 273
81
111 to 114
241 to 244
80
274
1 to 80
54 112
81 110 80
82 to 110
110 40
111 to 112 110 60
113 to 114
60 110
115 to 240
40 110
241 to 242
60 110
243 to 244 110 60
245 to 273 110 40
274 110 80
All pad
14 (Typ.)
Unit
µm
DataShee
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KS0718 pdf, datenblatt
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KS0718
SPEC. VER. 1.4
81 COM / 104 SEG DRIVER & CONTROLLER FOR STN LCD
MICROPROCESSOR INTERFACE
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Table 6. Microprocessor Interface Pins
Name
I/O
Description
RESETB
Reset the input pin
I
When RESETB is "L", initialization is executed.
Parallel/Serial data input select input
PS Interface
Data/
Mode
Instruction
Data
Read / Write Serial Clock
PS
I H Parallel
RS
DB0 to DB7
E_RD
RW_WR
-
L Serial
RS
SID(DB7)
Write only
SCLK(DB6)
C68
CS1B
CS2
RS
*NOTE: When PS is "L", DB0 to DB5 are high impedance and E_RD and RW_WR
must be fixed to either "H" or "L".
Microprocessor interface select input pin
I C68 = "H": 6800-series MPU interface
C68 = "L": 8080-series MPU interface
Chip select input pins
I Data/instruction I/O is enabled only when CS1B is "L" and CS2 is "H". When chip
select is non-active, DB0 to DB7 may be high impedance.
Register select input pinDataSheet4U.com
I RS = "H": DB0 to DB7 are display data
RS = "L": DB0 to DB7 are control data
Read / Write execution control pin
C68 MPU Type RW_WR
Description
DataShee
RW_WR
I
H 6800-series
L 8080-series
RW
/WR
Read/Write control input pin
RW = "H": read
RW = "L": write
Write enable clock input pin
The data on DB0 to DB7 are latched at the rising
edge of the /WR signal.
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