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PDF MT5C128K8A1 Data sheet ( Hoja de datos )
| Número de pieza | MT5C128K8A1 | |
| Descripción | 128K x 8 SRAM | |
| Fabricantes | Micron Technology | |
| Logotipo |  |
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SEMICONDUCTOR, INC.
MT5C128K8A1
REVOLUTIONARY PINOUT 128K x 8 SRAM
SRAM
128K x 8 SRAM
WITH SINGLE CHIP ENABLE,
REVOLUTIONARY PINOUT
FEATURES
• High speed: 12, 15, 20 and 25ns
• Multiple center power and ground pins for greater
PIN ASSIGNMENT (Top View)
noise immunity
• Easy memory expansion with ?C/E and ?O/E options
• Automatic ?C/E power down
• All inputs and outputs are TTL-compatible
32-Pin SOJ
(SD-5)
• High-performance, low-power, CMOS double-metal
process
A3 1
32 A4
• Single +5V ±10% power supply
A2 2
31 A5
• Fast ?O/E access times: 6, 8, 10 and 12ns
A1 3
30 A6
A0 4
29 A7
OPTIONS
• Timing
12ns access
15ns access
20ns access
25ns access
• 2V data retention (optional)
MARKING
-12
-15
-20
-25 DataSheet4U.com
L
CE
DQ1
DQ2
Vcc
Vss
DQ3
DQ4
WE
5
6
7
8
9
10
11
12
28 OE
27 DQ8
26 DQ7
25 Vss
24 Vcc
23 DQ6
22 DQ5
21 A8
• Temperature
Commercial (0°C to +70°C)
None
A16 13
A15 14
A14 15
20 A9
19 A10
18 A11
• Packages
A13 16
17 A12
32-pin SOJ (400 mil)
DJ
• Part Number Example: MT5C128K8A1DJ-25 L
DataShee
GENERAL DESCRIPTION
The MT5C128K8A1 is organized as a 131,072 x 8 SRAM
using a four-transistor memory cell with a high-speed, low-
power CMOS process. Micron SRAMs are fabricated using
double-layer metal, double-layer polysilicon technology.
This device offers multiple center power and ground pins
for improved performance. For flexibility in high-speed
memory applications, Micron offers chip enable (?C/E) and
output enable (?OE/ ) with this organization. This enhancement
DataSheceant4pUla.cceothme outputs in High-Z for additional flexibility in
system design.
Writing to these devices is accomplished when write
enable (?W/E) and ?C/E inputs are both LOW. Reading is
accomplished when ?W/E remains HIGH and ?C/E and ?O/E go
LOW. The device offers a reduced power standby mode
when disabled. This allows system designers to meet low
standby power requirements.
All devices operate from a single +5V power supply and
all inputs and outputs are fully TTL-compatible.
MT5C128K8A1
Rev. 11/94
DataSheet4 U .com
1-81
Micron Semiconductor, Inc., reserves the right to change products or specifications without notice.
©1994, Micron Semiconductor, Inc.
1 page  
www.DataSheet4U.com
SEMICONDUCTOR, INC.
CAPACITANCE
DESCRIPTION
Input Capacitance
Output Capacitance
MT5C128K8A1
REVOLUTIONARY PINOUT 128K x 8 SRAM
CONDITIONS
TA = 25°C; f = 1 MHz
VCC = 5V
SYMBOL
CI
CO
MAX
5
5
UNITS
pF
pF
NOTES
4
4
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
(Notes 5, 15) (0°C ≤ TA ≤ 70°C; VCC = 5V ±10%)
et4U.comREAD Cycle
DESCRIPTION
READ cycle time
Address access time
Chip Enable access time
Output hold from address change
Chip Enable to output in Low-Z
Chip disable to output in High-Z
Chip Enable to power-up time
Chip disable to power-down time
Output Enable access time
Output Enable to output in Low-Z
Output disable to output in High-Z
WRITE Cycle
WRITE cycle time
Chip Enable to end of write
Address valid to end of write
Address setup time
Address hold from end of write
WRITE pulse width
WRITE pulse width
Data setup time
Data hold time
Write disable to output in Low-Z
Write Enable to output in High-Z
-12 -15
SYM MIN MAX MIN MAX
tRC 12
15
tAA 12
tACE
12
tOH 4
4
tLZCE 4
5
tHZCE
6
tPU 0
0
tPD 12
tAODEataSheet46U.com
tLZOE 0
0
tHZOE
6
15
15
6
15
8
6
-20
MIN MAX
20
20
20
4
5
8
0
20
10
0
8
-25
MIN MAX
25
25
25
4
5
8
0
25
12
0
8
UNITS NOTESDataShee
ns
ns
ns
ns
ns 7
ns 6, 7
ns
ns
ns
ns
ns 6
tWC 12 15 20 25 ns
tCW 10 12 13 15 ns
tAW 9
10 12 14 ns
tAS 0 0 0 0 ns
tAH 0 0 0 0 ns
tWP1
9
10 12 14 ns
tWP2
9
10 12 14 ns
tDS 6
8 10 10 ns
tDH 0 0 0 0 ns
tLZWE 3 3 3 3 ns 7
tHZWE
6
6
8
8 ns 6, 7
DataSheet4U.com
MT5C128K8A1
Rev. 11/94
D a t a S4 Uh. ec eo tm
1-85
Micron Semiconductor, Inc., reserves the right to change products or specifications without notice.
©1994, Micron Semiconductor, Inc.
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet MT5C128K8A1.PDF ] | |
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