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PDF MC-10H124-F Data sheet ( Hoja de datos )

Número de pieza MC-10H124-F
Descripción MC10H124FN
Fabricantes Motorola Semiconductors 
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No Preview Available ! MC-10H124-F Hoja de datos, Descripción, Manual

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Quad TTL-to-MECL Translator
With TTL Strobe Input
MC10H124
The MC10H124 is a quad translator for interfacing data and control
signals between a saturated logic section and the MECL section of digital
systems. The 10H part is a functional/pinout duplication of the standard
MECL 10K family part, with 100% improvement in propagation delay, and
no increase in power–supply current.
Propagation Delay, 1.5 ns Typical
Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
Voltage Compensated
MECL 10K–Compatible
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
MAXIMUM RATINGS
Characteristic
Symbol
Rating
Unit
Power Supply (VCC = 5.0 V)
Power Supply (VEE = –5.2 V)
Input Voltage (VCC = 5.0 V) TTL
Output Current — Continuous
— Surge
VEE
VCC
VI
Iout
–8.0 to 0
0 to +7.0
0 to VCC
50
100
Vdc
Vdc
Vdc
mA
Operating Temperature Range
Storage Temperature Range — Plastic
— Ceramic
TA
0 to +75
°C
Tstg
–55 to +150
°C
–55 to +165
ELECTRICAL CHARACTERISTICS (VEE = –5.2 V ±5%, VCC = 5.0 V ± 5.0%)
0° 25° 75°
Characteristic
Symbol Min Max Min Max Min Max Unit
Negative Power
Supply Drain
Current
IE
— 72 — 66 —
72 mA
Positive Power Supply
Drain Current
Reverse Current
Pin 6
Pin 7
ICCH
ICCL
IR
— 16 — 16 —
— 25 — 25 —
— 200 — 200 —
— 50 — 50 —
18 mA
25 mA
µA
200
50
Forward Current
Pin 6
Pin 7
IF mA
— –12.8 — –12.8 —
–12.8
— –3.2 — –3.2 —
–3.2
Input Breakdown
Voltage
V(BR)in 5.5 — 5.5 — 5.5
— Vdc
Input Clamp Voltage
VI
— –1.5 — –1.5 —
–1.5 Vdc
High Output Voltage
VOH –1.02 –0.84 –0.98 –0.81 –0.92 –0.735 Vdc
Low Output Voltage
VOL –1.95 –1.63 –1.95 –1.63 –1.95 –1.60 Vdc
High Input Voltage
VIH 2.0 — 2.0 — 2.0 — Vdc
Low Input Voltage
VIL
— 0.8 — 0.8 —
0.8 Vdc
NOTE:
Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table,
after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit
board and transverse air flow greater than 500 Ifpm is maintained. Outputs are terminated through a
50–ohm resistor to –2.0 volts.
LOGIC DIAGRAM
54
62
73
1
10 12
15
11 13
14
GND = PIN 16
VCC ( +5.0 VDC) = PIN 9
VEE ( –5.2 VDC) = PIN 8
DIP
PIN ASSIGNMENT
BOUT
AOUT
BOUT
AOUT
AIN
COMMON
STROBE
BIN
VEE
1
2
3
4
5
6
7
8
16 GND
15 COUT
14 DOUT
13 DOUT
12 COUT
11 DIN
10 CIN
9 VCC
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–36 of the Motorola MECL Data
Book (DL122/D).
www.DataSheet4U.com
9/96
© Motorola, Inc. 1996
2–5
REV 6

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