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PDF MAX6391 Data sheet ( Hoja de datos )
| Número de pieza | MAX6391 | |
| Descripción | (MAX6391 / MAX6392) Dual Voltage uP Supervisory Circuits | |
| Fabricantes | Maxim Integrated Products | |
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19-2210; Rev 1; 10/02
Dual-Voltage µP Supervisory Circuits
with Sequenced Reset Outputs
General Description
The MAX6391/MAX6392 microprocessor (µP) supervisory
circuits provide sequenced logic reset outputs for multi-
component or dual-voltage systems. Each device can
monitor two supply voltages and time-sequence two reset
outputs to control the order in which system components
are turned on and off. The MAX6391/MAX6392 increase
system reliability and reduce circuit complexity and cost
compared to separate ICs or discrete components.
The MAX6391/MAX6392 monitor VCC as the master
reset supply. Both RESET1 and RESET2 are asserted
whenever VCC drops below the selected factory-fixed
reset threshold voltage. RESET1 remains asserted as
long as VCC is below the threshold and deasserts
140ms (min) after VCC exceeds the thresholds.
RESET IN2 is monitored as the secondary reset supply
and is adjustable with an external resistive-divider net-
work. RESET2 is asserted whenever either VCC or
RESET IN2 is below the selected thresholds. RESET2
remains asserted 140ms (min) or a capacitor-
adjustable time period after VCC and RESET IN2
exceed their thresholds. RESET2 is always deasserted
after RESET1 during system power-up and is always
asserted before RESET1 during power-down.
The MAX6391 includes two internal pullup resistors for
RESET1 and RESET2 (the open-drain outputs can be
externally connected to the desired pullup voltages).
The MAX6392 includes an active-low manual reset
input (MR) that asserts both RESET1 (push-pull) and
RESET2 (open drain).
The MAX6391/MAX6392 are available in small 8-pin
SOT23 packages and are specified over the -40°C to
+85°C extended temperature range.
Applications
Computers
Controllers
Critical µP Power Monitoring
Set-Top Boxes
Printers
Servers/Workstations
Industrial Equipment
Multivoltage Monitoring
Features
o Preset VCC Reset Threshold Voltages from 1.58V
to 4.63V (master supply)
o Customer-Adjustable RESET IN2 to Monitor
Voltages Down to 625mV (secondary supply)
o Fixed (140ms min) RESET1 Timeout
o Fixed (140ms min) or Customer-Adjustable
RESET2 Timeout Period
o Guaranteed Reset Valid to VCC = 1V
o Active-Low Open-Drain Outputs or Push-
Pull/Open-Drain Combination
o Internal Open-Drain Pullup Resistors (for external
VOH voltage connections)
o Manual Reset Input (MAX6392 only)
o Immune to Short Negative VCC Transients
o 15µA Typical Supply Current
o Few External Components
o Small 8-Pin SOT23 Package
Ordering Information
PART*
MAX6391KA_ _-T
MAX6392KA_ _-T
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
SOT23-8
SOT23-8
*Insert the desired suffix (see Selector Guide) into the blanks to
complete the part number. The MAX6391/MAX6392 require a
2.5k minimum order increment and are available in tape-and-
reel only. Samples are typically available for standard versions
(see Selector Guide for standard versions). Contact factory for
availability.
Pin Configurations
TOP VIEW
RESET IN2 1
VCC 2
CSRT 3
GND 4
MAX6391
8 R1
7 RESET1
6 R2
5 RESET2
Twypwicawl O.DpearattainSg hCierceuitt4aUpp.ecaorsmat end of data sheet.
SOT23-8
Pin Configurations continued at end of data sheet.
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1 page  
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Dual-Voltage µP Supervisory Circuits
with Sequenced Reset Outputs
Pin Description
PIN
MAX6391 MAX6392
11
22
33
44
55
66
77
8—
—8
NAME
FUNCTION
RESET IN2
VCC
CSRT
GND
RESET2
R2
RESET1
R1
MR
Input Voltage for RESET2 Monitor. High-impedance input for internal reset
comparator. Connect this pin to an external resistive-divider network to set the reset
threshold voltage.
Supply Voltage and Input Voltage for Primary Supply Monitor
RESET2 Delay Set Capacitor. Connect to VCC for a fixed 140ms (min) timeout period
or to an external capacitor for a user-adjustable timeout period after VCC exceeds its
minimum threshold.
Ground
Secondary Reset Output, Open-Drain, Active-Low. RESET2 changes from high to low
when either VCC or RESET IN2 drop below their thresholds. RESET2 remains low for a
user-adjustable timeout period (see CSRT) or a fixed 140ms (min) after VCC and
RESET IN2 meet their minimum thresholds.
47kΩ Internal Pullup Resistor for RESET2. Connect to external voltage for RESET2
high pullup.
Primary Reset Output, Open-Drain (MAX6391) or Push-Pull (MAX6392), Active-Low.
RESET1 changes from HIGH to LOW when the VCC input drops below the selected
reset threshold. RESET1 remains LOW for the reset timeout period after VCC exceeds
the minimum threshold.
47kΩ Internal Pullup Resistor for RESET1. Connect to external voltage for RESET1
high pullup.
Manual Reset, Active-Low, Internal 47kΩ Pullup to VCC. Pull LOW to force a reset.
RESET1 and RESET2 remain asserted as long as MR is LOW and for the RESET1 and
RESET2 timeout periods after MR goes HIGH. Leave unconnected or connect to VCC
if unused.
Detailed Description
Each device includes a pair of voltage monitors with
sequenced reset outputs. The first block monitors VCC
only (RESET1 output is independent of the RESET IN2
monitor). It asserts a reset signal (LOW) whenever VCC
is below the preset voltage threshold. RESET1 remains
asserted for at least 140ms after VCC rises above the
reset threshold. RESET1 timing is internally set in each
device. VCC voltage thresholds are available from
1.57V to 4.63V. In all cases VCC acts as the master
supply (all resets are asserted when VCC goes below
its selected threshold). The VCC input also acts as the
device power supply.
The second block monitors both RESET IN2 and VCC. It
asserts a reset signal (LOW) whenever RESET IN2 is
below the 625mV threshold or VCC is below its reset
thwrewshwol.dD. RaEtaSESTh2ereemt4aiUns.caossmerted for a fixed 140ms
(min) or a user-adjustable time period after RESET IN2
rises above the 625mV reset threshold and RESET1 is
deasserted. Resets are guaranteed valid for VCC down
to 1V.
The timing diagram in Figure 2 shows the reset timing
characteristics of the MAX6391/MAX6392. As shown in
Figure 2, RESET1 deasserts 140ms (min) (tRP1) after
VCC exceeds the reset threshold. RESET2 deasserts
tRP2 (140ms minimum or a user-adjustable timeout peri-
od) after RESET IN2 exceeds 625mV and RESET1 is
deasserted. When RESET IN2 drops below 625mV
while VCC is above the reset threshold, RESET2 asserts
within 10µs typ. RESET1 is unaffected when this hap-
pens. When VCC falls below VTH1, RESET2 always
asserts before RESET1 (tRD2 < tRD1).
_______________________________________________________________________________________ 5
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet MAX6391.PDF ] | |
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