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PDF CXG1156K Data sheet ( Hoja de datos )

Número de pieza CXG1156K
Descripción POWER AMPLIFIER MODULE FOR JCDMA
Fabricantes Sony Corporation 
Logotipo Sony Corporation Logotipo



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( DataSheet : www.DataSheet4U.com )
CXG1156K
Power Amplifier Module for JCDMA
Description
The CXG1156K is the power amplifier module which
operates at a single power supply. This IC is designed
using the Sony’s original p-Gate HFET process.
10 pin LCC (Ceramic)
Features
Single power supply operation:
VDD1 = VDD2 = 3.5V (High power mode),
1.3V (Low power mode 1),
1.0V (Low power mode 2),
VGG = 2.7V
Small package: 0.065cc (6.2mm × 6.2mm × 1.7mm)
High efficiency: ηadd = 40%@POUT = 27.5dBm (High power mode),
ηadd = 23%@POUT = 15dBm (Low power mode 1)
Output power (high/low power mode switching supported):
POUT = 18 to 27.5dBm: High power mode,
POUT = 15 to 18dBm: Low power mode 1,
POUT 15dBm: Low power mode 2
Gain: Gp = 29dB (@900MHz)
Applications
Power amplifier for JCDMA system cellular phones
Structure
p-Gate HFET module
Absolute Maximum Ratings (Ta = 25°C)
Operating case temperature Tcase
–30 to +90
°C
Storage temperature
Tstg
–30 to +125
°C
Bias voltage
VDD1, VDD2
6
V
Bias voltage
VGG 3.3 V
(@VDD1 = VDD2 = 3.5V)
Input power
PIN 8 dBm
Recommended Operating Conditions*
VDD1 = VDD2 = 3.2 to 4.2V@POUT = 18 to 27.5dBm,
1.3 to 2.0V@POUT 18dBm,
1.0 to 2.0V@POUT 15dBm
VGG = 2.7V ± 1%
*This recommended operating voltage is the value that specified the supply voltage range where the functional
operation was confirmed by the Sony’s recommended evaluation board.
GaAs module is ESD sensitive devices. Special handling precautions are required.
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E02641-PS
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CXG1156K pdf
CXG1156K
Example of Representative Characteristics
Conditions: f = 900MHz
VDD1 = VDD2 = 3.5V, VGG = 2.7V (High power mode)
VDD1 = VDD2 = 1.3V, VGG = 2.7V (Low power mode 1)
Ta = 25°C
POUT vs. PIN
32
30 VDD = 3.5V
28 VDD = 1.3V
26
24
22
20
18
16
14
12
10
8
6
4
2
–26 –24 –22 –20 –18 –16 –14 –12 –10 –8 –6 –4 –2 0 2 4
PIN [dBm]
ACPR1 vs. POUT
–34
–36
–38
–40
VDD = 3.5V
VDD = 1.3V
–42
–44
–46
–48
–50
–52
–54
–56
–58
–60
–62
–64
–66
–68
–70
–72
–74
4 6 8 10 12 14 16 18 20 22 24 26 28 30 32
POUT [dBm]
IDD vs. POUT
600
550 VDD = 3.5V
500 VDD = 1.3V
450
400
350
300
250
200
150
100
50
0
4 6 8 10 12 14 16 18 20 22 24 26 28 30 32
POUT [dBm]
ACPR2 vs. POUT
–48
–50 VDD = 3.5V
–52 VDD = 1.3V
–54
–56
–58
–60
–62
–64
–66
–68
–70
–72
–74
–76
–78
4 6 8 10 12 14 16 18 20 22 24 26 28 30 32
POUT [dBm]
–5–

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