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C8051F321 Schematic ( PDF Datasheet ) - Silicon Laboratories

Teilenummer C8051F321
Beschreibung (C8051F320 / C8051F321) Full Speed USB / 16k ISP FLASH MCU Family
Hersteller Silicon Laboratories
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Gesamt 30 Seiten
C8051F321 Datasheet, Funktion
( DataSheet : www.DataSheet4U.com )
C8051F320/1
Full Speed USB, 16k ISP FLASH MCU Family
ANALOG PERIPHERALS
- 10-Bit ADC
Up to 200 ksps
Up to 17 or 13 External Single-Ended or Differential
Inputs
VREF from External Pin, Internal Reference, or VDD
Built-in Temperature Sensor
External Conversion Start Input
- Two Comparators
- Internal Voltage Reference
- POR/Brown-Out Detector
USB FUNCTION CONTROLLER
- USB Specification 2.0 Compliant
- Full Speed (12 Mbps) or Low Speed (1.5 Mbps)
Operation
- Integrated Clock Recovery; No External Crystal
Required for Full Speed or Low Speed
- Supports Eight Flexible Endpoints
- 1k Byte USB Buffer Memory
- Integrated Transceiver; No External Resistors Required
ON-CHIP DEBUG
- On-Chip Debug Circuitry Facilitates Full Speed,
Non-Intrusive In-System Debug (No Emulator
Required!)
- Provides Breakpoints, Single Stepping,
Inspect/Modify Memory and Registers
- Superior Performance to Emulation Systems Using
ICE-Chips, Target Pods, and Sockets
VOLTAGE REGULATOR INPUT: 4.0V TO 5.25V
HIGH SPEED 8051 µC Core
- Pipelined Instruction Architecture; Executes 70% of
Instructions in 1 or 2 System Clocks
- Up to 25 MIPS Throughput with 25 MHz Clock
- Expanded Interrupt Handler
MEMORY
- 2304 Bytes Internal RAM (1k + 256 + 1k USB FIFO)
- 16k Bytes FLASH; In-system programmable in 512-byte
Sectors
DIGITAL PERIPHERALS
- 25/21 Port I/O; All 5 V tolerant with High Sink Current
- Hardware Enhanced SPI™, Enhanced UART, and
SMBus™ Serial Ports
- Four General Purpose 16-Bit Counter/Timers
- 16-Bit Programmable Counter Array (PCA) with Five
Capture/Compare Modules
- Real Time Clock Mode using External Clock Source and
PCA or Timer
CLOCK SOURCES
- Internal Oscillator: 0.25% Accuracy with Clock
Recovery enabled. Supports all USB and UART Modes
- External Oscillator: Crystal, RC, C, or Clock (1 or 2 Pin
Modes)
- Can Switch Between Clock Sources on-the-fly; Useful in
Power Saving Strategies
PACKAGES
- 32-pin LQFP (C8051F320)
- 28-pin MLP (C8051F321)
TEMPERATURE RANGE: -40°C TO +85°C
ANALOG
PERIPHERALS
A 10-bit +
M
U
X
200ksps
ADC
-
+
-
TEMP
SENSOR
VREF
VREG
DIGITAL I/O
UART
SPI
SMBus
PCA
Timer 0
Timer 1
Timer 2
Timer 3
Port 0
Port 1
Port 2
Port 3
PRECISION INTERNAL
OSCILLATOR
USB Controller /
Transceiver
HIGH-SPEED CONTROLLER CORE
16KB
ISP FLASH
16
INTERRUPTS
8051 CPU
(25MIPS)
DEBUG
CIRCUITRY
2304 B
SRAM
POR WDT
Preliminary Rev. 1.1 12/03
Copyright © 2003 by Silicon Laboratories
C8051F320/1-DS11
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
www.DataSheet4U.com
www.DataSheet4U.com






C8051F321 Datasheet, Funktion
C8051F320/1
17.1. Enhanced Baud Rate Generation...................................................................................194
17.2. Operational Modes ........................................................................................................195
17.2.1. 8-Bit UART .........................................................................................................195
17.2.2. 9-Bit UART .........................................................................................................196
17.3. Multiprocessor Communications...................................................................................197
18. ENHANCED SERIAL PERIPHERAL INTERFACE (SPI0) .........................................203
18.1. Signal Descriptions........................................................................................................204
18.1.1. Master Out, Slave In (MOSI) ..............................................................................204
18.1.2. Master In, Slave Out (MISO) ..............................................................................204
18.1.3. Serial Clock (SCK) ..............................................................................................204
18.1.4. Slave Select (NSS)...............................................................................................204
18.2. SPI0 Master Mode Operation........................................................................................205
18.3. SPI0 Slave Mode Operation ..........................................................................................207
18.4. SPI0 Interrupt Sources...................................................................................................207
18.5. Serial Clock Timing ......................................................................................................208
18.6. SPI Special Function Registers .....................................................................................210
19. TIMERS ...............................................................................................................................217
19.1. Timer 0 and Timer 1......................................................................................................217
19.1.1. Mode 0: 13-bit Counter/Timer.............................................................................217
19.1.2. Mode 1: 16-bit Counter/Timer.............................................................................218
19.1.3. Mode 2: 8-bit Counter/Timer with Auto-Reload .................................................219
19.1.4. Mode 3: Two 8-bit Counter/Timers (Timer 0 Only) ...........................................220
19.2. Timer 2 .......................................................................................................................225
19.2.1. 16-bit Timer with Auto-Reload ...........................................................................225
19.2.2. 8-bit Timers with Auto-Reload............................................................................226
19.2.3. USB Start-of-Frame Capture ...............................................................................227
19.3. Timer 3 .......................................................................................................................230
19.3.1. 16-bit Timer with Auto-Reload ...........................................................................230
19.3.2. 8-bit Timers with Auto-Reload............................................................................231
19.3.3. USB Start-of-Frame Capture ...............................................................................232
20. PROGRAMMABLE COUNTER ARRAY (PCA0) .........................................................235
20.1.PCA Counter/Timer.......................................................................................................236
20.2. Capture/Compare Modules............................................................................................237
20.2.1. Edge-triggered Capture Mode .............................................................................238
20.2.2. Software Timer (Compare) Mode........................................................................239
20.2.3. High Speed Output Mode ....................................................................................240
20.2.4. Frequency Output Mode ......................................................................................241
20.2.5. 8-Bit Pulse Width Modulator Mode ....................................................................242
20.2.6. 16-Bit Pulse Width Modulator Mode ..................................................................244
20.3. Watchdog Timer Mode..................................................................................................246
20.3.1. Watchdog Timer Operation .................................................................................246
20.3.2. Watchdog Timer Usage .......................................................................................247
20.4. Register Descriptions for PCA ......................................................................................248
21. C2 INTERFACE ..................................................................................................................253
21.1. C2 Interface Registers ...................................................................................................253
6 Rev. 1.1

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C8051F321 pdf, datenblatt
C8051F320/1
Figure 14.16. P2MDIN: Port2 Input Mode Register .............................................................139
Figure 14.17. P2MDOUT: Port2 Output Mode Register.......................................................140
Figure 14.18. P2SKIP: Port2 Skip Register...........................................................................140
Figure 14.19. P3: Port3 Register............................................................................................141
Figure 14.20. P3MDIN: Port3 Input Mode Register .............................................................141
Figure 14.21. P3MDOUT: Port3 Output Mode Register.......................................................142
Table 14.1. Port I/O DC Electrical Characteristics ..............................................................142
15. UNIVERSAL SERIAL BUS CONTROLLER (USB0) ...................................................143
Figure 15.1. USB0 Block Diagram........................................................................................143
Table 15.1. Endpoint Addressing Scheme............................................................................144
Figure 15.2. USB0XCN: USB0 Transceiver Control............................................................145
Figure 15.3. USB0 Register Access Scheme .........................................................................146
Figure 15.4. USB0ADR: USB0 Indirect Address Register ...................................................147
Figure 15.5. USB0DAT: USB0 Data Register ......................................................................148
Figure 15.6. INDEX: USB0 Endpoint Index (USB Register) ...............................................148
Table 15.2. USB0 Controller Registers ................................................................................149
Figure 15.7. CLKREC: Clock Recovery Control (USB Register) ........................................150
Figure 15.8. USB FIFO Allocation........................................................................................151
Table 15.3. FIFO Configurations .........................................................................................152
Figure 15.9. FIFOn: USB0 Endpoint FIFO Access (USB Registers) ...................................152
Figure 15.10. FADDR: USB0 Function Address (USB Register) ........................................153
Figure 15.11. POWER: USB0 Power (USB Register) ..........................................................155
Figure 15.12. FRAMEL: USB0 Frame Number Low (USB Register) .................................156
Figure 15.13. FRAMEH: USB0 Frame Number High (USB Register) ................................156
Figure 15.14. IN1INT: USB0 IN Endpoint Interrupt (USB Register)...................................157
Figure 15.15. OUT1INT: USB0 Out Endpoint Interrupt (USB Register).............................158
Figure 15.16. CMINT: USB0 Common Interrupt (USB Register)........................................159
Figure 15.17. IN1IE: USB0 IN Endpoint Interrupt Enable (USB Register) .........................160
Figure 15.18. OUT1IE: USB0 Out Endpoint Interrupt Enable (USB Register)....................160
Figure 15.19. CMIE: USB0 Common Interrupt Enable (USB Register) ..............................161
Figure 15.20. E0CSR: USB0 Endpoint0 Control (USB Register) ........................................164
Figure 15.21. E0CNT: USB0 Endpoint 0 Data Count (USB Register) .................................165
Figure 15.22. EINCSRL: USB0 IN Endpoint Control High Byte (USB Register) ...............168
Figure 15.23. EINCSRH: USB0 IN Endpoint Control Low Byte (USB Register) ...............169
Figure 15.24. EOUTCSRL: USB0 OUT Endpoint Control High Byte (USB Register) .......171
Figure 15.25. EOUTCSRH: USB0 OUT Endpoint Control Low Byte (USB Register) .......172
Figure 15.26. EOUTCNTL: USB0 OUT Endpoint Count Low (USB Register) ..................172
Figure 15.27. EOUTCNTH: USB0 OUT Endpoint Count High (USB Register) .................172
Table 15.4. USB Transceiver Electrical Characteristics ......................................................173
16. SMBUS .................................................................................................................................175
Figure 16.1. SMBus Block Diagram .....................................................................................175
Figure 16.2. Typical SMBus Configuration ..........................................................................176
Figure 16.3. SMBus Transaction ...........................................................................................177
Table 16.1. SMBus Clock Source Selection.........................................................................180
Figure 16.4. Typical SMBus SCL Generation.......................................................................181
12 Rev. 1.1

12 Page





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