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PDF MC68HC711PB8 Data sheet ( Hoja de datos )
| Número de pieza | MC68HC711PB8 | |
| Descripción | (MC68HCx11Px8) Microcontroller | |
| Fabricantes | Motorola Semiconductors | |
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MC68HC11PA8/D
HC11
MC68HC11PA8
MC68HC711PA8
MC68HC11PB8
MC68HC711PB8
TECHNICAL
DATA
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MC68HC11PA8/
MC68HC11PB8
MC68HC711PA8/
MC68HC711PB8
High-density complementary
metal oxide semiconductor
(HCMOS) microcontroller unit
All Trade Marks recognized. This document contains information on new products. Specifications and information herein are
subject to change without notice.
All products are sold on Motorola’s Terms & Conditions of Supply. In ordering a product covered by this document the
Customer agrees to be bound by those Terms & Conditions and nothing contained in this document constitutes or forms part
of a contract (with the exception of the contents of this Notice). A copy of Motorola’s Terms & Conditions of Supply is available
on request.
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty,
representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any
liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including
without limitation consequential or incidental damages. “Typical” parameters can and do vary in different applications. All
operating parameters, including “Typicals”, must be validated for each customer application by customer’s technical experts.
Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed,
intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a
situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended
or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and
distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly
or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and !are registered
trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.
The Customer should ensure that it has the most up to date version of the document by contacting its local Motorola office.
This document supersedes any earlier documentation relating to the products referred to herein. The information contained
in this document is current at the date of publication. It may subsequently be updated, revised or withdrawn.
© MOTOROLA LTD., 1997
TPG
5 Page 
Paragraph
Number
TITLE
Page
Number
4.3.1.1
HPRIO — Highest priority I-bit interrupt & misc. register ........................... 4-11
4.3.2 Initialization ...................................................................................................... 4-12
4.3.2.1
CONFIG — System configuration register ................................................. 4-12
4.3.2.2
INIT — RAM and I/O mapping register ...................................................... 4-14
4.3.2.3
INIT2 — EEPROM mapping register ......................................................... 4-15
4.3.2.4
OPTION — System configuration options register 1.................................. 4-16
4.3.2.5
OPT2 — System configuration options register 2 ...................................... 4-18
4.3.2.6
BPROT — Block protect register................................................................ 4-20
4.3.2.7
TMSK2 — Timer interrupt mask register 2................................................. 4-21
4.4 EPROM, EEPROM and CONFIG register ............................................................. 4-22
4.4.1 EPROM............................................................................................................ 4-22
4.4.1.1
EPROG — EPROM programming control register..................................... 4-22
4.4.1.2
EPROM programming ................................................................................ 4-23
4.4.2 EEPROM ......................................................................................................... 4-24
4.4.2.1
PPROG — EEPROM programming control register .................................. 4-24
4.4.2.2
EEPROM bulk erase .................................................................................. 4-26
4.4.2.3
EEPROM row erase ................................................................................... 4-27
4.4.2.4
EEPROM byte erase .................................................................................. 4-27
4.4.3 CONFIG register programming........................................................................ 4-27
4.4.4 RAM and EEPROM security ............................................................................ 4-28
5
RESETS AND INTERRUPTS
5.1 Resets ................................................................................................................... 5-1
5.1.1 Power-on reset................................................................................................. 5-1
5.1.2 External reset (RESET) ................................................................................... 5-2
5.1.3 COP reset ........................................................................................................ 5-2
5.1.3.1
COPRST — Arm/reset COP timer circuitry register................................... 5-3
5.1.4 Clock monitor reset .......................................................................................... 5-3
5.1.5 OPTION — System configuration options register 1 ....................................... 5-4
5.1.6 CONFIG — Configuration control register ....................................................... 5-5
5.2 Effects of reset....................................................................................................... 5-7
5.2.1 Central processing unit .................................................................................... 5-7
5.2.2 Memory map.................................................................................................... 5-7
5.2.3 Parallel I/O ....................................................................................................... 5-8
5.2.4 Timer................................................................................................................ 5-8
5.2.5 Real-time interrupt (RTI) .................................................................................. 5-8
5.2.6 Pulse accumulator ........................................................................................... 5-8
5.2.7 Computer operating properly (COP)................................................................ 5-9
5.2.8 Serial communications interface (SCI)............................................................. 5-9
5.2.9 Serial peripheral interface (SPI)....................................................................... 5-9
5.2.10 I2C bus ............................................................................................................. 5-9
5.2.11 Analog-to-digital converter............................................................................... 5-9
5.2.12 System............................................................................................................. 5-9
MC68HC11PA8
TABLE OF CONTENTS
TPG
MOTOROLA
iii
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| PDF Descargar | [ Datasheet MC68HC711PB8.PDF ] | |
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