Datenblatt-pdf.com


STA013B Schematic ( PDF Datasheet ) - ST Microelectronics

Teilenummer STA013B
Beschreibung (STA013x) MPEG 2.5 LAYER III AUDIO DECODER
Hersteller ST Microelectronics
Logo ST Microelectronics Logo 




Gesamt 30 Seiten
STA013B Datasheet, Funktion
STA013
® STA013B STA013T
MPEG 2.5 LAYER III AUDIO DECODER
SINGLE CHIP MPEG2 LAYER 3 DECODER
SUPPORTING:
- All features specified for Layer III in ISO/IEC
11172-3 (MPEG 1 Audio)
- All features specified for Layer III in ISO/IEC
13818-3.2 (MPEG 2 Audio)
m- Lower sampling frequencies syntax extension,
(not specified by ISO) called MPEG 2.5
oDECODES LAYER III STEREO CHANNELS,
.cDUAL CHANNEL, SINGLE CHANNEL
(MONO)
SUPPORTING ALL THE MPEG 1 & 2 SAM-
PLING FREQUENCIES AND THE EXTEN-
USION TO MPEG 2.5:
t448, 44.1, 32, 24, 22.05, 16, 12, 11. 025, 8 KHz
ACCEPTS MPEG 2.5 LAYER III ELEMEN-
TARY COMPRESSED BITSTREAM WITH
eDATA RATE FROM 8 Kbit/s UP TO 320 Kbit/s
DIGITAL VOLUME CONTROL
eDIGITAL BASS & TREBLE CONTROL
hSERIAL BITSTREAM INPUT INTERFACE
ANCILLARY DATA EXTRACTION VIA I2C IN-
STERFACE.
SERIAL PCM OUTPUT INTERFACE (I2S
taAND OTHER FORMATS)
PLL FOR INTERNAL CLOCK AND FOR OUT-
aPUT PCM CLOCK GENERATION
LOW POWER CONSUMPTION:
85mW AT 2.4V
.DCRC CHECK AND SYNCHRONISATION ER-
ROR DETECTION WITH SOFTWARE INDI-
CATORS
wI2C CONTROL BUS
LOW POWER 3.3V CMOS TECHNOLOGY
w10 MHz, 14.31818 MHz, OR 14.7456 MHz
EXTERNAL INPUT CLOCK OR BUILT-IN IN-
wDUSTRY STANDARD XTAL OSCILLATOR
DIFFERENT FREQUENCIES MAY BE SUP-
mPORTED UPON REQUEST TO STM
.coAPPLICATIONS
t4UPC SOUND CARDS
eeMULTIMEDIA PLAYERS
SO28
TQFP44
LFBGA64
ORDERING NUMBERS: STA013$ (SO28)
STA013T$ (TQFP44)
STA013B$ (LFBGA 8x8)
DESCRIPTION
The STA013 is a fully integrated high flexibility
MPEG Layer III Audio Decoder, capable of de-
coding Layer III compressed elementary streams,
as specified in MPEG 1 and MPEG 2 ISO stand-
ards. The device decodes also elementary streams
compressed by using low sampling rates, as speci-
fied by MPEG 2.5.
STA013 receives the input data through a Serial
Input Interface. The decoded signal is a stereo,
mono, or dual channel digital output that can be
sent directly to a D/A converter, by the PCM Out-
put Interface. This interface is software program-
mable to adapt the STA013 digital output to the
most common DACs architectures used on the
market.
The functional STA013 chip partitioning is de-
scribed in Fig.1.
www.DataShFebruary 2004
1/38






STA013B Datasheet, Funktion
STA013 - STA013B - STA013T
Figure 3. Test Circuit
OUT_CLK/DATA_REQ
VDD
100nF
VSS
VDD
100nF
VSS
VDD
100nF
VSS
VDD
100nF
VDD
VSS
PVDD
4.7µF
4.7µF
VSS PVSS
Figure 4. Test Load Circuit
OUTPUT
IOL
28
1
2
14
13
16
15
23
22
17
18
100nF
27
PVDD
PVSS
26 25
3
4
9
10
11
12
5
6
7
8
21
20
19
24
SDA
SCL
SDO
SCKT
LRCKT
OCLK
SDI
SCKR
BIT_EN
SCR_INT
XTI
XTO
RESET
SCANEN
TESTEN
470pF
D98AU966
10K
1K
4.7nF
PVSS
VDD
VREF
Test Load
Output
SDA
Other Outputs
IOL
1mA
100µA
IOH
100µA
CL
100pF
100pF
VREF
3.6V
1.5V
CL IOH
D98AU967
2. FUNCTIONAL DESCRIPTION
2.1 - Clock Signal
The STA013 input clock is derivated from an ex-
ternal source or from a industry standard crystal
oscillator, generating input frequencies of 10,
14.31818 or 14.7456 MHz.
Other frequencies may be supported upon re-
quest to STMicroelectronics. Each frequency is
supported by downloading a specific configura-
tion file, provided by STM
XTI is an input Pad with specific levels.
Symbol
VIL
VIH
Parameter
Low Level Input Voltage
High Level Input Voltage
Test Condition
Min.
VDD-0.8
Typ.
Max.
VDD-1.8
Unit
V
V
CMOS compatibility
The XTI pad low and high levels are CMOS compatible; XTI pad noise margin is better than typical
CMOS pads.
TTL compatibility
The XTI pad low level is compatible with TTL while the high level is not compatible (for example if VDD =
3V TTL min high level = 2.0V while XTI min high level = 2.2V)
6/38

6 Page









STA013B pdf, datenblatt
STA013 - STA013B - STA013T
I2C REGISTERS (continued)
HEX_COD
$43
$44
$45
$46
$47
$48
$49
$50
$51
$52
$54
$55
$56
$59
$5A
$5B
$5C
$5D
$61
$63
$64
$65
$67
$68
$69
$6A
$71
$72
$77
$78
$79
$7A
$7B
$7C
$7D
DEC_COD
67
68
69
70
71
72
73
80
81
82
84
85
86
89
90
91
92
93
97
99
100
101
103
104
105
106
113
114
119
120
121
122
123
124
125
DESCRIPTION
HEAD_H[23:16]
HEAD_M[15:8]
HEAD_L[7:0]
DLA
DLB
DRA
DRB
MFSDF_441
PLLFRAC_441_L
PLLFRAC_441_H
PCM DIVIDER
PCMCONF
PCMCROSS
ANC_DATA_1 [7:0]
ANC_DATA_2 [15:8]
ANC_DATA_3 [23:16]
ANC_DATA_4 [31:24]
ANC_DATA_5 [39:32]
MFSDF (X)
DAC_CLK_MODE
PLLFRAC_L
PLLFRAC_H
FRAME_CNT_L
FRAME_CNT_M
FRAME_CNT_H
AVERAGE_BITRATE
SOFTVERSION
RUN
TREBLE_FREQUENCY_LOW
TREBLE_FREQUENCY_HIGH
BASS_FREQUENCY_LOW
BASS_FREQUENCY_HIGH
TREBLE_ENHANCE
BASS_ENHANCE
TONE_ATTEN
RESET
0x00
0x00
0x00
0x00
0xFF
0x00
0xFF
0x00
0x00
0x00
0x03
0x21
0x00
0x00
0x00
0x00
0x00
0x00
0x07
0x00
0x46
0x5B
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
Note:
1) The HEX_COD is the hexadecimal adress that the microcontroller has to generate to access the information.
2) RESERVED: register used for production test only, or for future use.
R/W
R(8)
R(8)
R(8)
R/W (8)
R/W (8)
R/W (8)
R/W (8)
R/W (8)
R/W (8)
R/W (8)
R/W (8)
R/W (8)
R/W (8)
R (8)
R (8)
R (8)
R (8)
R (8)
R/W (8)
R/W (8)
R/W (8)
R/W (8)
R (8)
R (8)
R (8)
R (8)
R (8)
R/W (8)
R/W (8)
R/W (8)
R/W (8)
R/W (8)
R/W (8)
R/W (8)
R/W (8)
12/38

12 Page





SeitenGesamt 30 Seiten
PDF Download[ STA013B Schematic.PDF ]

Link teilen




Besondere Datenblatt

TeilenummerBeschreibungHersteller
STA013(STA013x) MPEG 2.5 LAYER III AUDIO DECODERST Microelectronics
ST Microelectronics
STA013B(STA013x) MPEG 2.5 LAYER III AUDIO DECODERST Microelectronics
ST Microelectronics
STA013T(STA013x) MPEG 2.5 LAYER III AUDIO DECODERST Microelectronics
ST Microelectronics

TeilenummerBeschreibungHersteller
CD40175BC

Hex D-Type Flip-Flop / Quad D-Type Flip-Flop.

Fairchild Semiconductor
Fairchild Semiconductor
KTD1146

EPITAXIAL PLANAR NPN TRANSISTOR.

KEC
KEC


www.Datenblatt-PDF.com       |      2020       |      Kontakt     |      Suche