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GE28F256K3 Schematic ( PDF Datasheet ) - Intel Corporation

Teilenummer GE28F256K3
Beschreibung (GE28FxxxKx) Intel StrataFlash Memory (J3)
Hersteller Intel Corporation
Logo Intel Corporation Logo 




Gesamt 70 Seiten
GE28F256K3 Datasheet, Funktion
Intel StrataFlash® Synchronous Memory
(K3/K18)
28F640K3, 28F640K18, 28F128K3, 28F128K18, 28F256K3,
28F256K18 (x16)
Datasheet
Product Features
Performance
m—110/115/120 ns Initial Access Speed for
64/128/256 Mbit Densities
o—25 ns Asynchronous Page-Mode Reads,
8 Words Wide
.c—13 ns Synchronous Burst-Mode Reads,
8 or 16 Words Wide
— 32-Word Write Buffer
U—Buffered Enhanced Factory
Programming
t4Software
— 25 µs (typ.) Program and Erase Suspend
eLatency Time
— Flash Data Integrator (FDI), Common
eFlash Interface (CFI) Compatible
— Programmable WAIT Signal Polarity
hQuality and Reliability
— Operating Temperature:
S–40 °C to +85 °C
— 100K Minimum Erase Cycles per Block
ata—0.18 µm ETOX™ VII Process
Architecture
— Multi-Level Cell Technology: High
Density at Low Cost
— Symmetrical 64 K-Word Blocks
— 256 Mbit (256 Blocks)
— 128 Mbit (128 Blocks)
— 64 Mbit (64 Blocks)
— Ideal for “CODE + DATA” applications
Security
— 2-Kbit Protection Register
— Unique 64-bit Device Identifier
— Absolute Data Protection with VPEN and
WP#
— Individual and Instantaneous Block
Locking, Unlocking and Lock-Down
Capability
Packaging and Voltage
— 64-Ball Intel® Easy BGA Package
(128-Mbit is also offered in a lead-free
package)
— 56-and 79-Ball Intel® VF BGA Package
— VCC = 2.70 V to 3.60 V
— VCCQ = 1.65 to 1.95 V/2.375 to 3.60 V
The Intel StrataFlash® Synchronous Memory (K3/K18) product line adds a high performance
.Dburst-mode interface and other additional features to the Intel StrataFlash® memory family of
products. Just like its J3 counterpart, the K3/K18 device utilizes reliable and proven two-bit-per-
cell technology to deliver 2x the memory in 1x the space, offering high density flash at low cost.
wThis is Intel’s third generation MLC technology, manufactured on 0.18 µm lithography, making
it the most widely used and proven MLC product family on the market.
wK3/K18 is a 3-volt device (core), but it is available with 3-volt (K3) or 1.8-volt (K18) I/O
mvoltages. These devices are ideal for mainstream applications requiring large storage space for
w oboth code and data storage. Advanced system designs will benefit from the high performance
.cpage and burst modes for direct execution from the flash memory. Available in densities from 64
Mbit to 256 Mbit (32 Mbyte), the K3/K18 device is the highest density NOR-based flash
t4Ucomponent available today, just as it was when Intel introduced the original device in 1997.
heeNotice: This document contains information on new products in production. The specifications
Sare subject to change without notice. Verify with your local Intel sales office that you have the lat-
est datasheet before finalizing a design.
.DataOrder Number: 290737-009
www February 2005






GE28F256K3 Datasheet, Funktion
28F640K3, 28F640K18, 28F128K3, 28F128K18, 28F256K3, 28F256K18
Revision History
Date of
Revision
08/22/01
09/24/01
09/27/01
02/22/02
06/17/02
06/11/03
12/01/03
5/19/04
2/1/05
Revision
Description
-001
-002
-003
-004
-005
-006
-007
-008
-009
Original Version
Corrected Typographical Errors in 11.0 AC Characteristics section.
Change VFBGA Package from 64 to 56 ball package. Add ordering info in
Appendix E.
Changes to ballouts per engineering review and editing/formatting updates.
Changes to Iccr, elimination of Speed Bin 2, expansion of Vccq range.
Corrections to Ordering Information, typcs, added Next-State Table, Appendix A
info. Added table of Latency Count settings to Section 4.3.2.
Update PDF presentation.
Reformatted the document layout.
Added lead-free information.
6 Datasheet

6 Page









GE28F256K3 pdf, datenblatt
28F640K3, 28F640K18, 28F128K3, 28F128K18, 28F256K3, 28F256K18
2.6 Memory Map
The K3/K18 device array is divided into symmetrical blocks that are 64-Kword in size. A 64 Mbit
device contains 64 blocks, a 128 Mbit device contains 128 blocks and a 256 Mbit device contains
256 blocks. Flash cells within a block are organized by rows and columns. A block contains 512
rows by 128 words. The words on a row are divided into 16 eight-word groups. (See Figure 2.)
Figure 2. K3/K18 Device Memory Map
0xFFFFFF
0xFF0000
Block 255
.
.
.
0x7FFFFF
0x7F0000
Block 127
.
.
.
0x3FFFFF
0x3F0000
Block 63
.
.
.
0x3FFFF
0x2FFFF
0x1FFFF
0xFFFF
0
Block 3
Block 2
Block 1
Block 0
12 Datasheet

12 Page





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