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PDF PUCC3801 Data sheet ( Hoja de datos )
| Número de pieza | PUCC3801 | |
| Descripción | Current-mode PWM controller | |
| Fabricantes | NXP Semiconductors | |
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PUCC3801
Current-mode PWM controller
Rev. 01 — 10 September 2001
Product data
1. General description
The PUCC3801 is a current-mode Pulse Width Modulated (PWM) controller
containing all the control and protection functions necessary to implement an off-line,
flyback or forward converter with a minimum number of external components.
2. Features
s Very low start-up supply current; 50 µA typical
s Low operating supply current; 1.2 mA typical
s Accurate, internally-trimmed, fixed frequency oscillator (100 kHz). No external
timing components needed
s Internal slope compensation. No external ramp components needed
s Built-in over-voltage and under-voltage detection
s High-speed over-current trip; 170 ns typical
s Over-voltage clamp on supply voltage (VDD)
s Internal divider regulates VDD to 12 V. No external divider needed
s Leading edge blanking of the current sense signal
s Control frequency modulated over a narrow band to reduce Electromagnetic
Interference (EMI)
s High output drive capability; 150 ns typical rise and fall time into 2 nF load
s Wide bandwidth (10 MHz) error amplifier with external compensation pin and
simple interface to optocoupler
s Accurate internal bandgap reference.
3. Applications
s Off-line switched mode power supplies
s Laptop computer mains adaptors
s Printer power supplies.
1 page  
Philips Semiconductors
PUCC3801
Current-mode PWM controller
With reference to Figure 4, assume that VDD is rising slowly from zero to 12 V. The
Power Manager produces a Power-On Reset (POR) signal that is routed to every
flip-flop and counter in the device. This signal is made active as early as possible in
the power-up sequence to ensure that the internal logic is reset and the device
powers up in a known state.
The POR remains active until the bandgap reference voltage (Vbandgap) stabilizes and
the comparators in the power manager block have all settled into stable states. The
POR signal is then released and, once the supply voltage, VDD reaches 10 V, the
controller section is enabled and the device starts to produce output pulses.
VDD
12.0
10.0
(V)
4.0
VDD
03af32
− 2.0
POR 6.0
VREG 5.0
VDD(comp)
(V) 2.0
− 1.0
3.0
2.5
Vbandgap
(V)
1.0
VDD(comp)
VREG
POR
Vbandgap
− 0.5
0
50 100 150 200 250 300
time (µs)
Fig 4. Power-up sequence.
Over-voltage and under-voltage functions: Figure 5 shows the over-voltage trip
sequence.
1.2mA
IDD 70 µA
70 µA
1.2mA
VOUT
VDD
10 V
14 V
10 V
5V
regulated VDD = 12V
VREG VREG = 3 V (off)
VREG = 6 V (on)
3V
03af33
6V
Fig 5. Over-voltage and under-voltage functions.
A coarse internal supply VREG is generated by the VREG section. In standby mode,
this supply drops to a low level, typically 3 V, and the current into the VDD pin is limited
to a low value, less than 70 µA.
9397 750 08419
Product data
Rev. 01 — 10 September 2001
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
5 of 16
5 Page 
Philips Semiconductors
PUCC3801
Current-mode PWM controller
11. Marking
Figure 7 shows the method of interfacing an optocoupler to the PUCC3801. The error
amplifier is overridden by holding the FB pin LOW. This causes the output of the error
amplifier to go HIGH. In this state, the amplifier sources a constant current of typically
50 µA into the collector of the optocoupler. The pull-up resistor to VDD sets the
saturation current of the optocoupler transistor.
The secondary side circuit using the TL431 adjustable precision shunt regulator, is a
widely used technique not specific to the PUCC3801. The 180 Ω resistor biases the
TL431 in its linear region. If the output voltage rises above the regulation point, the
TL431 draws current through the optocoupler causing the voltage on COMP to fall.
As the voltage on COMP falls, the duty cycle is reduced bringing the secondary
voltage back to its set point.
8
TYPE
LOGO LOT
DATE
1
03ag14
TYPE: PUCC3801P
LOT: Diffusion lot number (5 characters)
DATE: Die revision (1 character) + Date code (yyww)
Fig 8. Marking PUCC3801P (SOT97-1).
8
TYPE
LOGO LOT
DATE
1
03ag15
TYPE: CC3801T
LOT: Diffusion lot number (5 characters)
DATE: Die revision (1 character) + Date code (yyww)
Fig 9. Marking PUCC3801T (SOT96-1).
9397 750 08419
Product data
Rev. 01 — 10 September 2001
© Koninklijke Philips Electronics N.V. 2001. All rights reserved.
11 of 16
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet PUCC3801.PDF ] | |
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