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PDF MS82V16520 Data sheet ( Hoja de datos )
| Número de pieza | MS82V16520 | |
| Descripción | Synchronous Graphics RAM | |
| Fabricantes | OKI Semiconductor | |
| Logotipo |  |
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E2L1056-39-72
¡ Semicoonmductor¡ Semiconductor
This versioMn:SJ8u2lV. 119695920
Previous version: Sep. 1998
MS82V16t45U2.c0262,144-Word ¥ 32-Bit ¥ 2-Bank Synchronous Graphics RAM
SheeDESCRIPTION
ataThe MS82V16520 is a synchronous graphics random access memory organized as 256 K words ¥ 32
.Dbits ¥ 2 banks.
This device can operate up to 143 MHz by using synchronous interface. In addition, it has 8-column
ww mBlock Write function and Write per bit function which improves performance in graphics
systems.
w oFEATURES
.c• 262,144 words ¥ 32 bits ¥ 2 banks memory
U• Single 3.3 V ±0.3 V power supply
• LVTTL compatible inputs and outputs
t4• All input signals are latched at rising edge of system clock
• Auto precharge and controlled precharge
e• Internal pipelined operation: column address can be changed every clock cycle
• Dual internal banks controlled by A10 (Bank Address: BA)
e• Independent byte operation via DQM0 to DQM3
• 8-column Block Write function
h• Persistent write per bit function
• Programmable burst sequence (Sequential/Interleave)
S• Programmable burst length (1, 2, 4, 8 and full page)
ta• Programmable CAS latency (2, 3)
• Burst stop function (full-page burst)
• Power Down operation and Clock Suspend operation
a• Auto refresh and self refresh capability
• 2,048 refresh cycles/32 ms
.D• Package:
100-pin plastic QFP (QFP100-P-1420-0.65-BK4) (Product : MS82V16520-xGA)
x indicates speed rank.
w mPRODUCT FAMILY
w .coFamily
w t4UMS82V16520-7
www.DataSheeMS82V16520-8
Clock Frequency
MHz (Max.)
143
125
Package
100-pin Plastic QFP (14 ¥ 20 mm)
1/66
1 page  
¡ Semiconductor
MS82V16520
COMMAND OPERATION
Mode Register Set Command (CS, RAS, CAS, WE, DSF = "Low")
The MS82V16520 has the mode register that defines the operation mode "CAS Latency, Burst
Length, Burst Sequence". The mode register is composed of eleven bits of memories
corresponding to address inputs A0 - A9 and BA. The Mode Register Set command should be
executed just after the MS82V16520 is powered on. Before entering this command, all banks
must be precharged. Next command can be issued after tRSC.
Special Mode Register Set Command (CS, RAS, CAS, WE = "Low", DSF = "High")
The MS82V16520 has the 32-bit color register for block write operation and the 32-bit mask
register for write per bit operation. The Special Mode Register Set command performs loading
mask register or color register. When A5 is "high", The mask data presented on the DQ0 - DQ31
is latched into the mask register. When A6 is "high", The color data presented on the DQ0 - DQ31
is latched into the color register. The Special Mode Register Set command must be executed
before Masked Block Write and Write Per Bit operations. Next command can be issued after
tRSC.
Auto Refresh Command (CS, RAS, CAS, DSF = "Low", WE, CKE = "High")
The Auto Refresh command performs refresh automatically by the address counter. The refresh
operation must be performed 2048 times within 32 ms and the next command can be issued after
tRC from last Auto Refresh command. Before entering this command, all banks must be
precharged.
Self Refresh Entry/Exit Command (CS, RAS, CAS, DSF, CKE = "Low", WE = "High")
The self refresh operation continues after the Self Refresh Entry command is entered, with CKE
level left "low". This operation terminates by making CKE level "high". The self refresh
operation is performed automatically by the internal address counter on the MS82V16520 chip.
In self refresh mode, no external refresh control is required. Before entering self refresh mode,
all banks must be precharged. Next command can be issued after tRC.
Single Bank Precharge Command (CS, RAS, WE, DSF, A9 = "Low", CAS = "High")
The Single Bank Precharge command triggers bank precharge operation. Precharge bank is
selected by BA.
All Banks Precharge Command (CS, RAS, WE, DSF = "Low", CAS, A9 = "High")
The All Bank Precharge command triggers precharge of both bank A and bank B.
5/66
5 Page 
¡ Semiconductor
MS82V16520
Function Truth Table (2/5)
Current State CS RAS CAS WE DSF Address
Read
(RD)
H¥¥¥¥
LHHH¥
¥
¥
LHHLH
¥
LHHL L
¥
LHLHH
¥
L H L H L BA, CA, AP
L H L L H BA, CA, AP
L H L L L BA, CA, AP
L L H H H BA, RA
L L H H L BA, RA
LLHLH
¥
L L H L L BA, AP
L L LHH
¥
LLLHL
¥
L L L L H Op-Code
L L L L L Op-Code
Write/Block Write H ¥ ¥ ¥ ¥
(WT/BW)
LHHH¥
¥
¥
LHHLH
¥
LHHL L
¥
LHLHH
¥
L H L H L BA, CA, AP
L H L L H BA, CA, AP
L H L L L BA, CA, AP
L L H H H BA, RA
L L H H L BA, RA
LLHLH
¥
L L H L L BA, AP
L L LHH
¥
LLLHL
¥
L L L L H Op-Code
L L L L L Op-Code
Action
NOP (Continue Row Active after Burst ends)
NOP (Continue Row Active after Burst ends)
ILLEGAL
1, 2, 4, 8 Burst Length; ILLEGAL
Full Page Burst; Burst Stop Æ Bank Active
ILLEGAL
Term Burst, new Read
Term Burst, start Block Write
Term Burst, start Write
ILLEGAL
ILLEGAL
ILLEGAL
Term Burst, execute Row Precharge
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
NOP (Continue Row Active after Burst ends)
NOP (Continue Row Active after Burst ends)
ILLEGAL
1, 2, 4, 8 Burst Length; ILLEGAL
Full Page Burst; Burst Stop Æ Row Active
ILLEGAL
Term Burst, start Read
Term Burst, new Block Write
Term Burst, new Write
ILLEGAL
ILLEGAL
ILLEGAL
Term Burst, execute Row Precharge
ILLEGAL
ILLEGAL
ILLEGAL
ILLEGAL
Note 1
Note
2
2
2
2
11/66
11 Page | ||
| Páginas | Total 67 Páginas | |
| PDF Descargar | [ Datasheet MS82V16520.PDF ] | |
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