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D72001C Schematic ( PDF Datasheet ) - NEC

Teilenummer D72001C
Beschreibung UPD72001C
Hersteller NEC
Logo NEC Logo 




Gesamt 30 Seiten
D72001C Datasheet, Funktion
DATA SHEET
MOS INTEGRATED CIRCUIT
µPD72001-11, 72001-A8
MULTI-PROTOCOL SERIAL CONTROLLERS
DESCRIPTION
The µPD72001-11 is an MPSC (Multi-Protocol Serial Controller) which is a general-purpose communication LSI
equipped with two sets of bidirectional parallel/serial converter circuits for data communication. This controller has
a transmitter function to convert the parallel data output by a data terminal into serial data and transmit this data to
a data transmission system such as a modem, and a receiver function to convert the serial data output by the data
transmission system into parallel data.
The MPSC can be used with data communications equipment with a variety of communication modes such as the
generally and widely used start-stop synchronization mode, and the HDLC mode which is used for high-speed
communication.
The µPD72001-A8 is a low-voltage model.
For this product, the following documents are separately available. Read these documents as well as this Data
Sheet.
• User’s Manual (S12472E)
(I) (S12753E)
• Application Notes (II) (On preparation)
(III) (On preparation)
FEATURES
• Two sets of parallel/serial circuits supporting three modes: start-stop synchronization, character synchronization,
and bit synchronization modes
Easy application to a system supporting two or more communication protocols such as a protocol converter or
ISDN terminal adapter
• DPLL (Digital Phase Locked Loop), baud rate generator, and crystal oscillation circuit for transmission/reception
clock
Helps reduce cost by decreasing the number of external circuits
• Many variations with power-saving features and small package size
Easy application to portable terminals and high-accuracy portable terminals
The features common to the µPD72001-11 and 72001-A8 are explained as the features of the MPSC in this
document.
The information in this document is subject to change without notice.
Document No. S12184EJ7V0DS00 (7th edition)
Date Published November 1997 N
Printed in Japan
The mark shows major revised points.
©
1997






D72001C Datasheet, Funktion
System CLK
CLK/Stby
CLK
Cont.
D7-0
RD
WR
C/D
B/A
RESET
DRQRXA
DRQTXA
DTRB/DRQRXB
DTRA/DRQTXB
INT
INTAK
PRI
PRO
DB
Buf.
RD/WR
Cont.
DMA
Cont.
INT
Cont.
Interface
Cont.
Ch.B
Internal Bus
CR
0-5
10-15
Cont.
Sign.
BRG
-H,L
SR
12-15
TXRX CLK
BRG
DPLL
CR/SR
8-9
SR0
0-3 4-7
SR1-4
10-11
RX
Buf.
CR TX
6-7 Buf.
RXCLK
TXCLK
TXRX CLK
Cont.
OSC
TXRX Cont.
Transmitter
Receiver
Ch.A

6 Page









D72001C pdf, datenblatt
µPD72001-11, 72001-A8
Function
Protocol
Start-stop
synchronization
COP/BOP
Note SR1: D2
Table 1-5. Auto Enable Bit and RTS Pin
Auto Enable Bit
0
1
Don’t Care
RTS Cont. Bit
0
1
When “0” from beginning
If set to “1” once and then reset
to “0”
1
0
1
RTS Pin Status
H
L
H
If “L” while All SentNote = “0”,
and “H” if All Sent = “1”
L
H
L
1.2 Pins Related to Transmission/Reception
(1) TXDA (Transmit Data A) and TXDB (Transmit Data B) ... Output
These pins output transmit data.
(2) RxDA (Receive Data A) and RxDB (Receive Data B) ... Input
These pins input receive data.
(3) XI1A/STRXCA (Crystal Input 1A/Source of Transmit Receive Clock A) ... Input
XI1B/STRXCB (Crystal Input 1B/Source of Transmit Receive Clock B) ... Input
The functions of these pins change depending on the setting of CR15: D7.
(a) When CR15: D7 = “0”
These pins function as the STRXC pins, and input the transmission and reception clocks, or input source
clocks to the internal BRG (Baud Rate Generator) and DPLL (Digital Phase Locked Loop).
(b) When CR15: D7 = “1”
These pins function as XI1 pins and connect one end of the crystal for transmission/reception clock source
oscillation.
(4) XI2A/SYNCA (Crystal Input 2A/Synchronization A) ... I/O
XI2B/SYNCB (Crystal Input 2B/Synchronization B) ... I/O
The functions of these pins change depending on the setting of CR15: D7.
(a) When CR15: D7 = 0
These pins function as SYNC pins. The functions of the SYNC pins differ as shown in Table 1-6, depending
on the setting of CR4.
(b) When CR15: D7 = “1”
These pins function as XI2 pins and connect one end of the crystal for transmission/reception clock source
oscillation.
12

12 Page





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