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PDF MB90MV405 Data sheet ( Hoja de datos )
| Número de pieza | MB90MV405 | |
| Descripción | (MB90M405 Series) 16-Bit Microcontroller | |
| Fabricantes | Fujitsu | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de MB90MV405 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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CM44-10116-2E
F2MC-16LX
16-BIT MICROCONTROLLER
.comMB90M405 Series
UHARDWARE MANUAL
www.DataSheet4www.DataSheet4U.com
1 page  
PREFACE
s Objectives and Intended Reader
Thank you for purchasing a Fujitsu semiconductor product.
The MB90M405 series is a series of general-purpose 16-bit microcontrollers with 60 built-in
high-tension-resistant output pins required for fluorescent display control. The MB90M405
series was developed for applications that require the control of a vacuum fluorescent tube
panel.
This manual, intended for engineers who design products using the MB90M405 series,
describes the functions and operations of MB90M405 series products.
s Trademark
F2MC is the abbreviation of FUJITSU Flexible Microcontroller.
Embedded Algorithm is a trademark of Advanced Micro Devices Corporation.
Other system and product names used in this manual are trademarks of their respective
companies or organizations.
The symbols TM and ® are sometimes omitted in the text.
s License
Purchase of FUJITSU Ltd, I2C components conveys a license under the Philips I2C Patent Right
to use.
These components in an I2C system, provided that the system conforms to the I2C Standard
Specification as defined by Philips.
i
5 Page 
6.7 Exception Processing Interrupt .......................................................................................................... 139
6.8 Stack Operations for Interrupt Processing ......................................................................................... 140
6.9 Sample Programs for Interrupt Processing ........................................................................................ 142
CHAPTER 7 SETTING A MODE .................................................................................... 147
7.1 Setting a Mode .................................................................................................................................. 148
7.2 Mode Pins (MD2 to MD0) .................................................................................................................. 149
7.3 Mode Data ......................................................................................................................................... 150
CHAPTER 8 I/O PORTS ................................................................................................. 153
8.1 Overview of I/O Ports ......................................................................................................................... 154
8.2 I/O Port Registers .............................................................................................................................. 156
8.3 Port 8 ................................................................................................................................................. 158
8.3.1 Port 8 Registers (PDR8 and DDR8) ............................................................................................. 160
8.3.2 Operation of Port 8 ....................................................................................................................... 161
8.4 Port 9 ................................................................................................................................................. 163
8.4.1 Port 9 Registers (PDR9 and DDR9) ............................................................................................. 165
8.4.2 Operation of Port 9 ....................................................................................................................... 166
8.5 Port A ................................................................................................................................................. 168
8.5.1 Port A Registers (PDRA, DDRA and ADER0) .............................................................................. 170
8.5.2 Operation of Port A ....................................................................................................................... 172
8.6 Port B ................................................................................................................................................. 174
8.6.1 Port B Registers (PDRB, DDRB and ADER1) .............................................................................. 176
8.6.2 Operation of Port B ....................................................................................................................... 178
8.7 Sample I/O Port Program .................................................................................................................. 180
CHAPTER 9 SERIAL I/O ................................................................................................ 181
9.1 Overview of the Serial I/O Unit .......................................................................................................... 182
9.2 Registers of the Serial I/O Unit .......................................................................................................... 183
9.2.1 Serial Mode Control Status Register (SMCR) .............................................................................. 184
9.2.2 Serial Shift Data Register (SDR) .................................................................................................. 188
9.3 Communication Prescaler Control Register (CDCR0/CDCR1) ......................................................... 189
9.4 Operation of the Serial I/O Unit .......................................................................................................... 191
9.4.1 Shift Clock .................................................................................................................................... 192
9.4.2 Operating States of the Serial I/O Unit ......................................................................................... 193
9.4.3 Start/Stop Timing of Shift Operation ............................................................................................. 195
9.4.4 Interrupt Function of the Serial I/O Unit ........................................................................................ 197
CHAPTER 10 TIMEBASE TIMER .................................................................................... 199
10.1 Overview of the Timebase Timer ....................................................................................................... 200
10.2 Configuration of the Timebase Timer ................................................................................................ 202
10.3 Timebase Timer Control Register (TBTC) ......................................................................................... 204
10.4 Timebase Timer Interrupts ................................................................................................................. 206
10.5 Operation of the Timebase Timer ...................................................................................................... 207
10.6 Usage Notes on the Timebase Timer ............................................................................................... 210
vii
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MB90MV405.PDF ] | |
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