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PDF PLL702-05 Data sheet ( Hoja de datos )
| Número de pieza | PLL702-05 | |
| Descripción | Low EMI Peripheral Clock Generator | |
| Fabricantes | PhaseLink | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de PLL702-05 (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
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om PLL702-05Preliminary
.cLow EMI Peripheral Clock Generator for Notebook & Motherboards
et4UFEATURES
he• Single Low EMI IC to replace multiple crystals and
taSoscillators on Notebooks and Motherboards (27MHz,
14.318MHz, 24.576MHz, 25MHz).
.Da• Selectable crystal input: 24.576MHz or 14.318MHz
(accuracy requirement +/- 20ppm)
w• Less than 10ppm Frequency Synthesis error, meeting
wAC97, IEEE1394, IEEE802 frequency precision
w specification.
m• 27MHz clock with 2 levels of Selectable Spread
Spectrum modulation +/- 0.5% and +/- 0.75% center.
o• 25MHz clock with double drive strength (Ethernet PHY
.cand MAC).
• 24.576MHz clocks for Audio Codec and IEEE1394.
• Available in 8-Pin SOIC.
t4UTable 1. SPREAD SPECTRUM SELECTION
eeSST1
SST0
SST Modulation only on
27MHz. (pin 15)
h0 1
+/- 0.75 %
00
+/- 0.5 %
S0 M
SST OFF (Default)
taNotes: M = Do not connect. 1 = Pulled up. 0 = Pulled down.
aBLOCK DIAGRAM
PIN ASSIGNMENT
XOUT
VSS
24.576MHz/SST0*T
VDD25B1
1
2
3
4
8 XIN
7 VDDoscB2
6 27_14.318MHz/XTAL_SEL*v
5 25MHzx2
Note: 25MHzx2: double drive strength
*: Bi-directional pin
v: Internal pull-down resistor (120kΩ) T: Tri-level input
POWER GROUPS
• VDDoscB2 – VSS: XIN, XOUT, analog core, digital part
and 27MHz.
• VDD25B1 – VSS: 24.576MHz, 25MHz.
Table 4. CRYSTAL SELECTION TABLE
Crystal Input
24.576MHz
14.318MHz
XTAL_SEL
0
1
.DSST(0)
wXIN
ww t4U.comXOUT
XTAL
OSC
XTAL_SEL
PLL
SST
XTAL_SEL
PLL2
VDDoscB2 27_14.318MHz
(pin6)
VDD25B1
24.576MHz
(pin3)
VDD25B1
25MHz
(pin5)
taSheeNote : Only 27MHz output is modulated for low EMI via Spread
Spectrum.
www.Da47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 3/24/03 Page 1
1 page  
Preliminary PLL702-05
Low EMI Peripheral Clock Generator for Notebook & Motherboards
3. DC Specification
PARAMETERS
Operating Voltage
Input High Voltage
Input Low Voltage
Input High Voltage
Input Low Voltage
Input High Voltage
Input Low Voltage
Output High Voltage
Output Low Voltage
Output High Voltage At
CMOS Level
Nominal Output Current
Operating Supply Current
Short-circuit Current
SYMBOL
VDD
VIH
VIL
VIH
VIL
VIH
VIL
VOH
VOL
VOH
IOUT
IDD
IS
CONDITIONS
Nominal voltage 3.3V
For all Tri-level input
For all Tri-level input
For all normal input
For all normal input
IOH = -30mA (normal drive)
IOH = -60mA (double drive)
IOL = 30mA (normal drive)
IOH = -60mA (double drive)
IOH = -8mA
Normal drive strength
Double drive strength
No Load
MIN.
2.97
VDD-0.5
2
2.4
VDD-0.4
30
60
TYP.
VDD/2
VDD/2
MAX.
3.63
VDD/2 - 1
0.5
0.8
UNITS
V
V
V
V
V
V
V
V
0.4 V
V
17
±100
mA
mA
mA
47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991
Rev 3/24/03 Page 5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet PLL702-05.PDF ] | |
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