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D75116GF Schematic ( PDF Datasheet ) - NEC

Teilenummer D75116GF
Beschreibung UPD75116GF
Hersteller NEC
Logo NEC Logo 




Gesamt 56 Seiten
D75116GF Datasheet, Funktion
Data Sheet
µPD75112(A), 75116(A)
4-Bit Single Chip-Microcomputer
Description
The µPD75116(A) is one of the 4-bit single-chip micro-
computer 75X series.
The µPD75116(A) is a product with the extended ROM
capacity of the µPD75108(A). In addition of high-speed
operations, it can manipulate data in units of 1, 4 and 8
bits. In particular, the I/O operation of the µPD75116
have been improved by a wide variety of bit control
instructions. The µPD75116 is provided with interface
inputs/outputs with peripheral circuits having different
power voltages, and analog inputs and suitable for
controlling automobile electrical equipment, etc. For
the µPD75116(A), an on-chip pin-compatible one-time
PROM product (µPD75P116) is separately available for
system development evaluation.
Functions are described in detail in the following User’s
Manual, which should be read when carrying out
design work.
µPD751×× Series User’s Manual: IEM-992
Ordering Code
Package
Qualty Grade
µPD75112CW(A)-××× 64-pin plastic shrink DIP
(750 mil)
µPD75112GF(A)-×××-3BE 64-pin plastic QFP
(14 × 20 mm)
µPD75116CW(A)-××× 64-pin plastic shrink DIP
(750 mil)
µPD75116GF(A)-×××-3BE 64-pin plastic QFP
(14 × 20 mm)
Remarks: ××× is a ROM code number.
Special
Special
Special
Special
Please refer to "Quality Grade on NEC Semicon-
ductor Devices" (Document number IEI-1209) pub-
lished by NEC Corporation to know the specifica-
tion of quality grade on the devices and its recom-
mended applications.
Unless there are any particular functional differences,
the µPD75116(A) is described in this document as a
representative product.
Features
Higher reliability than µPD75116
Architecture "75X" equivalent to 8-bit microcomputer
Minimum instruction execution time (high-speed
operation): 0.95 µs (when operated at 4.19 MHz and
5 V)
Instruction execution variable function: 0.95µs/1.91µs/
15.3 µs (when operated at 4.19 MHz)
Many input/output ports: 58
3-channel on-chip 8-bit timers
8-bit on-chip serial interface
Multi-interruptible vector interrupt function
Applications
Automobile electrical equipment, etc.
Document No. IC-2811A
(O. D. No. IC-8261A)
Date Published March 1994 P
Printed in Japan
The information in this document is subject to change without notice.
5The mark shows major revised points.
©NEC Corporation 1990






D75116GF Datasheet, Funktion
TI0
PTO0/P20
TI1
PTO1/P21
SI/P03
SI/P02
SCK/P01
INT0/P10
INT1/P11
INT2/P12
INT3/P13
INT4/P00
BASIC
INTERVAL
TIMER
INTBT
TIMER/EVENT
COUNTER
#0
INTT0
TIMER/EVENT
COUNTER
#1
INTT1
SERIAL
INTERFACE
INTSIO
INTERRUPT
CONTROL
PROGRAMMABLE
PTH00-PTH03 4 THRESHOLD
PORT # 0
PROGRAM
COUNTER (14)
ROM
PROGRAM
MEMORY
12160 × 8 BITS
(µPD75112(A))
16256 × 8 BITS
(µPD75116(A))
ALU CY SP (8)
BANK
DECODE
AND
CONTROL
GENERAL REG.
RAM
DATA MEMORY
512 × 4 BIT
fX/2 N
CLOCK
OUTPUT
CONTROL
CLOCK
DIVIDER
CLOCK
GENERATOR
STAND BY
CONTROL
CPU CLOCK
Φ
PCL/P22
X1 X2
VDD VSS RESET
BIT SEQ.
BUFFER(16)
PORT0
PORT1
4 P00-P03
4 P10-P13
PORT2
PORT3
PORT4
PORT5
PORT6
PORT7
PORT8
PORT9
4 P20-P23
4 P30-P33
4 P40-P43
4 P50-P53
4 P60-P63
4 P70-P73
4 P80-P83
4 P90-P93
PORT12
4 P120-P123
PORT13
4 P130-P133
PORT14
4 P140-P143

6 Page









D75116GF pdf, datenblatt
µPD75112(A), 75116(A)
Figure 4-2 Program Memory Map (µPD75116(A))
Address
7
6
0
0000H MBE RBE Internal Reset Start Address (High-Order 6 Bits)
Internal Reset Start Address (Low-Order 8 Bits)
0002H MBE RBE INTBT/INT4 Start Address (High-Order 6 Bits)
INTBT/INT4 Start Address (Low-Order 8 Bits)
0004H MBE RBE INT0/INT1 Start Address (High-Order 6 Bits)
INT0/INT1 Start Address (Low-Order 8 Bits)
0006H MBE RBE INTSIO Start Address
(High-Order 6 Bits)
INTSIO Start Address
(Low-Order 8 Bits)
0008H MBE RBE INTT0 Start Address
INTT0 Start Address
000AH MBE RBE INTT1 Start Address
(High-Order 6 Bits)
(High-Order 6 Bits)
(High-Order 6 Bits)
CALLF
! faddr
Instruction
Entry
Address
INTT1 Start Address
(Low-Order 8 Bits)
0020H
007FH
0080H
07FFH
0800H
0FFFH
1000H
1FFFH
2000H
2FFFH
3000H
3F7FH
GETI Instruction Reference Table
BRCB
! caddr
Instruction
Branch
Address
BRCB !caddr Instrucion
Branch Address
BRCB !caddr Instrucion
Branch Address
BRCB !caddr Instruction
Branch Address
CALL !addr
Instruction
Subroutin
Entry
Address
BR !addr
Instruction
Branch
Address
BR $addr
Instruction
Relative
Branch Address
(-15 to –1
+2 to +16)
Branch Address
Subroutine Entry
Address by GETI
Instruction
Remarks: In all other cases, the program can be
branched by the BR PCDE and BR PCXA
instructions to an address with only the lower
8 bits of PC changed.
12

12 Page





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