Datenblatt-pdf.com


NHI1583ET Schematic ( PDF Datasheet ) - National Hybrid

Teilenummer NHI1583ET
Beschreibung (NHI Series) Multi-Protocol Data Bus Interface
Hersteller National Hybrid
Logo National Hybrid Logo 




Gesamt 70 Seiten
NHI1583ET Datasheet, Funktion
www.DaNtaMSAhuNeTleHtti4IiU-POE.rcTooNmtoEAcnoLhlaDnHachteYadeBBeuTRtse4rIImnUDtien.,rcafIlaosncmec.Bus Controller, Remote Terminal, Bus Monitor
.DUasetra'sSManualVersion 2003.07.14
w July 2003
wThe information provided in this document is believed to be accurate; however, no responsibility is assumed by NATIONAL
HYBRID, INC. for its use, and no license or rights are granted by implication or otherwise in connection therewith. Specifications
mare subject to change without notice.
w .co2200 Smithtown Avenue, Ronkonkoma, NY 11779
t4UTelephone (631) 981- 2400 Data Bus Fax (631) 981- 2445
www.DataSheeWebsite http: //www.nationalhybrid.com






NHI1583ET Datasheet, Funktion
TABLE OF CONTENTS(continued)
12.0.0 PIN FUNCTIONS
.
.
.
.
.
.
80
12.1.0
GENERIC PACKAGE OUTLINE DRAWINGS .
.
.
81
12.1.1
QUAD FLAT PACK UNFORMED LEADS
.
.
.
81
12.1.2
QUAD FLAT PACK GULL WING LEADS
.
.
.
81
12.1.3 PIN GRID ARRAY
.
.
.
.
.
.
82
12.1.4 MICRO QUAD FLAT PACK UNFORMED LEADS
.
.
83
12.1.5 MICRO QUAD FLAT PACK GULL WING LEADS
.
.
83
13.0.0
MATING TRANSFORMER REFERENCE
.
.
.
84
14.0.0
ORDERING INFORMATION .
.
.
.
.
85
-5 -

6 Page









NHI1583ET pdf, datenblatt
3.3.3.1.1 INTERRUPT DEFINITION TABLE
PRIORITY
0
1
2
3
4
5
6
7
RTU INTERRUPT
VALID TX/RX EOM
INVALID TX/RX EOM
VALID MODE CODE
INVALID MODE CODE
FIFO OVERFLOW
VALID BROADCAST
INVALID BROADCAST
FAILSAFE TIMEOUT
BCU INTERRUPT
END OF MESSAGE
END OF FRAME
ERROR
RETRY
FIFO OVERFLOW
STATUS SET
NO RESPONSE
FAILSAFE TIMEOUT
MTU INTERRUPT
N/A
N/A
N/A
N/A
FIFO OVERFLOW
END OF FRAME
N/A
N/A
Note: RT Interrupts 5 & 6 are enabled only when separate Broadcast Tables are used.
Masking interrupt 4 creates a revolving Fifo.
As soon as an interrupt is requested, its vector is pushed onto the FIFO - so the chronological
order of the requests normally determines the order in which they will be serviced. Simultaneous
requests, however, are pushed onto the FIFO according to the priority of the pending interrupts.
The INTERRUPT MASK register masks the corresponding inputs to the INTERRUPT REQUEST
register. The INTERRUPT VECTOR register holds the 3 bit interrupt priority level and an
additional 5 bit field (see paragraph on INTERRUPT VECTOR register for details).
The AUXILIARY VECTOR register contains an additional byte of information related to the
interrupt request (see paragraph on AUXILIARY VECTOR register for details).
3.3.3.2 ICU FIFO
The ICU FIFO is 16 bits wide and 7 words deep. Whenever an unmasked interrupt request is
issued by the message processor, a word is pushed onto the FIFO. When an interrupt is
acknowledged by the host, a word is popped from the FIFO and used to update the IVR and the
AVR.
The host can read the FIFO by simply popping its contents. This is done by reading the FIFO
located at address 8 (refer to address map). The interrupt request output, *IRQ, will go inactive
after the FIFO is emptied in this way.
The host can mask the *IRQ output by resetting the INTERRUPT REQUEST ENABLE bit in the
CONTROL register; however this does not prevent the device from pushing interrupt requests
onto the FIFO.
If an interrupt request occurs when the FIFO is full, a vector indicating FIFO overflow is first
pushed onto the FIFO and then the vector which caused the overflow is pushed onto the FIFO.
As a result, the 2 oldest vectors are lost. All further pushes are then inhibited until the host pops
the vector indicating the overflow.
The above mechanism ensures that the host will always be notified of FIFO overflows and will
always obtain the 2 interrupt vectors immediately preceding the overflow condition.
If interrupt 4 is masked, the FIFO operates in the revolving mode; vectors are continuously
pushed onto the FIFO. After the 7th vector is pushed without any pops, each additional vector
pushed causes the oldest vector to be lost.
The FIFO can be emptied by writing (any value) to address 8 (in words).
- 11 -

12 Page





SeitenGesamt 70 Seiten
PDF Download[ NHI1583ET Schematic.PDF ]

Link teilen




Besondere Datenblatt

TeilenummerBeschreibungHersteller
NHI1583ET(NHI Series) Multi-Protocol Data Bus InterfaceNational Hybrid
National Hybrid

TeilenummerBeschreibungHersteller
CD40175BC

Hex D-Type Flip-Flop / Quad D-Type Flip-Flop.

Fairchild Semiconductor
Fairchild Semiconductor
KTD1146

EPITAXIAL PLANAR NPN TRANSISTOR.

KEC
KEC


www.Datenblatt-PDF.com       |      2020       |      Kontakt     |      Suche