PDF MT4LC16M4G3 Data sheet ( Hoja de datos )

Número de pieza	MT4LC16M4G3
Descripción	DRAM
Fabricantes	Micron Technology
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No Preview Available ! DRAM 16 MEG x 4 EDO DRAM MT4LC16M4G3, MT4LC16M4H9 For the latest data sheet, please refer to the Micron Web site: www.micronsemi.com/mti/msp/html/datasheet.html FEATURES • Single +3.3V ±0.3V power supply • Industry-standard x4 pinout, timing, functions, and packages • 12 row, 12 column addresses (H9) or 13 row, 11 column addresses (G3) • High-performance CMOS silicon-gate process • All inputs, outputs and clocks are LVTTL-compat- ible • Extended Data-Out (EDO) PAGE MODE access • Optional self refresh (S) for low-power data retention • 4,096-cycle CAS#-BEFORE-RAS# (CBR) REFRESH distributed across 64ms OPTIONS • Refresh Addressing 4,096 (4K) rows 8,192 (8K) rows MARKING H9 G3 • Plastic Packages 32-pin SOJ (400 mil) 32-pin TSOP (400 mil) DJ TG • Timing 50ns access 60ns access -5 -6 • Refresh Rates Standard Refresh Self Refresh (128ms period) None S* NOTE: 1. The 16 Meg x 4 EDO DRAM base number differentiates the offerings in one place— MT4LC16M4H9. The fifth field distinguishes the address offerings: H9 designates 4K addresses and G3 designates 8K addresses. 2. The “#” symbol indicates signal is active LOW. Contact factory for availability Part Number Example: MT4LC16M4H9DJ-6 KEY TIMING PARAMETERS SPEED -5 -6 tRC 84ns 104ns tRAC 50ns 60ns tPC 20ns 25ns tAA 25ns 30ns tCAC 13ns 15ns tCAS 8ns 10ns PIN ASSIGNMENT (Top View) 32-Pin SOJ 32-Pin TSOP VCC DQ0 DQ1 NC NC NC NC WE# RAS# A0 A1 A2 A3 A4 A5 VCC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 Vss 31 DQ3 30 DQ2 29 NC 28 NC 27 NC VCC DQ0 DQ1 NC NC NC NC 1 2 3 4 5 6 7 26 CAS# WE# 8 25 OE# RAS# 9 24 NC/A12* A0 10 23 A11 A1 11 22 A10 A2 12 A3 13 21 A9 A4 14 20 A8 A5 15 19 A7 VCC 16 18 A6 17 Vss NC on H9 version, A12 on G3 version 32 Vss 31 DQ3 30 DQ2 29 NC 28 NC 27 NC 26 CAS# 25 OE# 24 NC/A12 23 A11 22 A10 21 A9 20 A8 19 A7 18 A6 17 Vss 16 MEG x 4 EDO DRAM PART NUMBERS PART NUMBER MT4LC16M4H9DJ-x MT4LC16M4H9DJ-x S MT4LC16M4H9TG-x MT4LC16M4H9TG-x S MT4LC16M4G3DJ-x MT4LC16M4G3DJ-x S MT4LC16M4G3TG-x MT4LC16M4G3TG-x S x = speed REFRESH ADDRESSING 4K 4K 4K 4K 8K 8K 8K 8K PACKAGE SOJ SOJ TSOP TSOP SOJ SOJ TSOP TSOP REFRESH Standard Self Standard Self Standard Self Standard Self GENERAL DESCRIPTION The 16 Meg x 4 DRAM is a high-speed CMOS, dynamic random-access memory device containing 67,108,864 bits and designed to operate from 3V to 3.6V. The MT4LC16M4H9 and MT4LC16M4G3 are functionally organized as 16,777,216 locations con- taining 4 bits each. The 16,777,216 memory locations are arranged in 4,096 rows by 4,096 columns on the H9 version and 8,192 rows by 2,048 columns on the G3 version. During READ or WRITE cycles, each location is 16 Meg x 4 EDO DRAM D22_2.p65 – Rev. 5/00 1 Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000, Micron Technology, Inc. 1 page ABSOLUTE MAXIMUM RATINGS* Voltage on VCC Relative to VSS ................ -1V to +4.6V Voltage on NC, Inputs or I/O Pins Relative to VSS ....................................... -1V to +4.6V Operating Temperature, TA (ambient) ... 0°C to +70°C Storage Temperature (plastic) ............ -55°C to +150°C Power Dissipation ................................................... 1W 16 MEG x 4 EDO DRAM *Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. DC ELECTRICAL CHARACTERISTICS AND OPERATING CONDITIONS (Note: 1) (VCC = +3.3V ±0.3V) PARAMETER/CONDITION SUPPLY VOLTAGE INPUT HIGH VOLTAGE: Valid Logic 1; All inputs, I/Os and any NC INPUT LOW VOLTAGE: Valid Logic 0; All inputs, I/Os and any NC INPUT LEAKAGE CURRENT: Any input at VIN (0V ≤ VIN ≤ VCC + 0.3V); All other pins not under test = 0V OUTPUT HIGH VOLTAGE: IOUT = -2mA OUTPUT LOW VOLTAGE: IOUT = 2mA OUTPUT LEAKAGE CURRENT: Any output at VOUT (0V ≤ VOUT ≤ VCC + 0.3V); DQ is disabled and in High-Z state SYMBOL MIN VCC 3 MAX UNITS NOTES 3.6 V VIH 2 VCC + 0.3 V 26 VIL -0.3 0.8 V 26 II -2 2 µA 27 VOH 2.4 – V VOL – 0.4 V IOZ -5 5 µA 16 Meg x 4 EDO DRAM D22_2.p65 – Rev. 5/00 5 Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000, Micron Technology, Inc. 5 Page RAS# VVIIHL CAS# VVIIHL ADDR VVIIHL WE# VVIIHL DQ V V IOH IOL OE# VVIIHL tCRP tASR tRAD tRAH ROW EARLY WRITE CYCLE tRC tRAS tRCD tCSH tRSH tCAS tAR tASC tCAH tWCS COLUMN tCWL tRWL tWCR tWCH tWP tACH tDS tDH VALID DATA 16 MEG x 4 EDO DRAM tRP ROW DON’T CARE UNDEFINED TIMING PARAMETERS SYMBOL tACH tAR tASC tASR tCAH tCAS tCRP tCSH tCWL tDH tDS tRAD MIN 12 38 0 0 8 8 5 38 8 8 0 9 -5 MAX 10,000 MIN 15 45 0 0 10 10 5 45 15 10 0 12 -6 MAX 10,000 UNITS ns ns ns ns ns ns ns ns ns ns ns ns SYMBOL tRAH tRAS tRC tRCD tRP tRSH tRWL tWCH tWCR tWCS tWP MIN 9 50 84 11 30 13 13 8 38 0 5 -5 MAX 10,000 MIN 10 60 104 14 40 15 15 10 45 0 5 -6 MAX 10,000 UNITS ns ns ns ns ns ns ns ns ns ns ns 16 Meg x 4 EDO DRAM D22_2.p65 – Rev. 5/00 11 Micron Technology, Inc., reserves the right to change products or specifications without notice. ©2000, Micron Technology, Inc. 11 Page

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Número de pieza	Descripción	Fabricantes
MT4LC16M4G3	DRAM	Micron Technology

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