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PDF LT5516 Data sheet ( Hoja de datos )
| Número de pieza | LT5516 | |
| Descripción | 800MHz to 1.5GHz Direct Conversion Quadrature Demodulator | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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LT5516
800MHz to 1.5GHz Direct
Conversion Quadrature Demodulator
FEATURES
s Frequency Range: 800MHz to 1.5GHz
s High IIP3: 21.5dBm at 900MHz
s High IIP2: 52dBm
s Noise Figure: 12.8dB at 900MHz
s Conversion Gain: 4.3dB at 900MHz
s I/Q Gain Mismatch: 0.2dB
s Shutdown Mode
s 16-Lead QFN 4mm × 4mm Package
with Exposed Pad
U
APPLICATIO S
s Cellular/PCS/UMTS Infrastructure
s High Linearity Direct Conversion I/Q Receiver
s High Linearity I/Q Demodulator
DESCRIPTIO
The LT®5516 is an 800MHz to 1.5GHz direct conversion
quadrature demodulator optimized for high linearity re-
ceiver applications. It is suitable for communications
receivers where an RF or IF signal is directly converted into
I and Q baseband signals with bandwidth up to 260MHz.
The LT5516 incorporates balanced I and Q mixers, LO
buffer amplifiers and a precision, high frequency quadra-
ture generator.
In an RF receiver, the high linearity of the LT5516 provides
excellent spur-free dynamic range, even with fixed gain
front end amplification. This direct conversion receiver
can eliminate the need for intermediate frequency (IF)
signal processing, as well as the corresponding require-
ments for image filtering and IF filtering. Channel filtering
can be performed directly at the outputs of the I and Q
channels. These outputs can interface directly to channel-
select filters (LPFs) or to a baseband amplifier.
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATIO
BPF
LNA
BPF
LO INPUT
ENABLE
RF+
RF –
LO+
LO–
EN
5V
VCC
0°/90°
LT5516
IOUT+
LPF
VGA
IOUT–
0°
DSP
QOUT+
LPF
VGA
QOUT–
90°
5516 F01
Figure 1. High Signal-Level I/Q Demodulator for Wireless Infrastructure
I/Q Output Power, IM3 vs
RF Input Power
20
0
POUT
–20
–40
–60
–80
–100
–18
IM3 VCC = 5v
TA = 25°C
PLO = –10dBm
fLO = 901MHz
fRF1 = 899.9MHz
fRF2 = 900.1MHz
–14 –10 –6 –2 2
RF INPUT POWER (dBm)
6
5516 TA01
5516f
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1 page  
LT5516
TYPICAL PERFOR A CE CHARACTERISTICS
(Test circuit optimized for 900MHz operation as shown in Figure 2)
I/Q Phase Mismatch vs
RF Input Frequency
6
4
TA = – 40°C
2
0
TA = 25°C
TA = 85°C
–2
PLO = –10dBm
–4 fBB = 1MHz
VCC = 5V
R1 = 8.2Ω
–6
800 900 1000 1100 1200 1300 1400 1500
RF INPUT FREQUENCY (MHz)
5516 G06
Conv Gain, IIP3 vs LO Input Power
20 TA = 85°C
16
IIP3
TA = – 40°C
12 fLO = 901MHz
VCC = 5V
R1 = 8.2Ω
8
CONV GAIN
TA = – 40°C
4
TA = 85°C
TA = 25°C
TA = 25°C
0
–14
–12 –10 –8 –6 –4
LO INPUT POWER (dBm)
–2
5516 G08
NF vs LO Input Power
18
16 fRF = 1300MHz
14 fRF = 1100MHz
12 fRF = 900MHz
10
8
6
TA = 25°C
VCC = 5V
R1 = 8.2Ω
4
–14 –12 –10 –8 –6 –4
LO INPUT POWER (dBm)
–2
5516 G07
IIP2 vs LO Input Power
70
fLO = 901MHz
65
VCC = 5V
R1 = 8.2Ω
60
TA = 85°C
55
50 TA = – 40°C
45
TA = 25°C
40
35
30
–14
–12 –10 –8 –6 –4
LO INPUT POWER (dBm)
–2
5516 G09
Conv Gain, IIP3 vs Supply Voltage
20
TA = 85°C
16
TA = – 40°C
IIP3
12 fLO = 901MHz
PLO = –10dBm
R1 = 8.2Ω
8
CONV GAIN
TA = – 40°C
4
TA = 85°C
TA = 25°C
TA = 25°C
0
4 4.5 5 5.5
SUPPLY VOLTAGE (V)
5516 G10
5516f
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5 Page 
APPLICATIO S I FOR ATIO
VCC
J2
LO
T2
LDB31900M20C-416
26
1
34
LO+
10
L4
27nH
LO–
11
C2
1nF
2.44V
200Ω
2.44V
5516 F06
Figure 6. LO Input Equivalent Circuit with External Matching
LT5516
VCC
60Ω 60Ω 60Ω 60Ω
5pF
5pF
IOUT+ 16
IOUT–
15
QOUT+
14
QOUT–
13
Figure 7. I/Q Output Equivalent Circuit
5516 F07
PACKAGE DESCRIPTIO
UF Package
16-Lead Plastic QFN (4mm × 4mm)
(Reference LTC DWG # 05-08-1692)
0.72 ±0.05
4.35 ± 0.05
2.15 ± 0.05
2.90 ± 0.05 (4 SIDES)
PACKAGE OUTLINE
0.30 ±0.05
0.65 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
4.00 ± 0.10
(4 SIDES)
PIN 1
TOP MARK
0.75 ± 0.05
2.15 ± 0.10
(4-SIDES)
BOTTOM VIEW—EXPOSED PAD
R = 0.115
TYP
15 16
0.55 ± 0.20
1
2
0.200 REF
0.00 – 0.05
NOTE:
1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGC)
2. ALL DIMENSIONS ARE IN MILLIMETERS
3. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
4. EXPOSED PAD SHALL BE SOLDER PLATED
(UF) QFN 0802
0.30 ± 0.05
0.65 BSC
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet LT5516.PDF ] | |
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