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Teilenummer | MTV32N20E |
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Beschreibung | TMOS POWER FET 32 AMPERES 200 VOLTS RDS(on) = 0.075 OHM | |
Hersteller | Motorola Semiconductors | |
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Gesamt 10 Seiten MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Advance Information
TMOS E-FET.™
Power Field Effect Transistor
D3PAK for Surface Mount
N–Channel Enhancement–Mode Silicon Gate
This high voltage MOSFET uses an advanced termination
scheme to provide enhanced voltage–blocking capability without
degrading performance over time. In addition, this advanced TMOS
E–FET is designed to withstand high energy in the avalanche and
commutation modes. The new energy efficient design also offers a
drain–to–source diode with a fast recovery time. Designed for high
speed switching applications in power supplies, converters, PWM
motor controls, these devices are particularly well suited for bridge
circuits where diode speed and commutating safe operating areas
are critical and offer additional safety margin against unexpected
voltage transients.
D
N–Channel
• Robust High Voltage Termination
• Avalanche Energy Specified
• Source–to–Drain Diode Recovery Time Comparable to a Discrete
Fast Recovery Diode
• Diode is Characterized for Use in Bridge Circuits
• IDSS and VDS(on) Specified at Elevated Temperature
G
®
S
Order this document
by MTV32N20E/D
MTV32N20E
TMOS POWER FET
32 AMPERES
200 VOLTS
RDS(on) = 0.075 OHM
CASE 433–01, Style 2
D3PAK Surface Mount
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Symbol
Drain–to–Source Voltage
Drain–to–Gate Voltage (RGS = 1.0 MΩ)
Gate–to–Source Voltage — Continuous
Drain Current — Continuous
Drain Current — Continuous @ 100°C
Drain Current — Single Pulse (tp ≤ 10 µs)
Total Power Dissipation @ 25°C
Derate above 25°C
Total Power Dissipation @ TA = 25°C (1)
Operating and Storage Temperature Range
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C
(VDD = 50 Vdc, VGS = 10 Vdc, Peak IL = 32 Apk, L = 1.58 mH, RG = 25 Ω )
VDSS
VDGR
VGS
ID
ID
IDM
PD
TJ, Tstg
EAS
Thermal Resistance — Junction to Case
Thermal Resistance — Junction to Ambient
Thermal Resistance — Junction to Ambient (1)
RθJC
RθJA
RθJA
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds
TL
(1) When surface mounted to an FR4 board using the minimum recommended pad size.
This document contains information on a new product. Specifications and information herein are subject to change without notice.
E–FET is a trademark of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
Thermal Clad is a trademark of the Bergquist Company.
Value
200
200
±20
32
19
128
180
1.44
2.0
– 55 to 150
810
0.7
62.5
35
260
Unit
Vdc
Vdc
Vdc
Adc
Apk
Watts
W/°C
Watts
°C
mJ
°C/W
°C
© MMoototororloa,laIncT.M19O96S Power MOSFET Transistor Device Data
1
MTV32N20E
SAFE OPERATING AREA
100 10 µs
0.1 ms
1.0 ms
10
VGS = 20 V
SINGLE PULSE
1.0 TC = 25°C
10 ms
dc
0.1
1.0
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
10 100
VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
1000
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
750 ID = 32 A
600
450
300
150
0
25 50 75 100 125 150
TJ, STARTING JUNCTION TEMPERATURE (°C)
Figure 12. Maximum Avalanche Energy versus
Starting Junction Temperature
1.0
D = 0.5
0.2
0.1
0.1 0.05
0.02
0.01 0.01
SINGLE PULSE
0.001
1.0E–02
1.0E–01
1.0E+00
P(pk)
t1
t2
DUTY CYCLE, D = t1/t2
1.0E+01
t, TIME (s)
1.0E+02
RθJC(t) = r(t) RθJC
RθJC = 0.7°C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) – TC = P(pk) RθJC(t)
1.0E+03
1.0E+04
Figure 13. Thermal Response
IS
tp
di/dt
trr
ta tb
0.25 IS
IS
TIME
Figure 14. Diode Reverse Recovery Waveform
6 Motorola TMOS Power MOSFET Transistor Device Data
6 Page | ||
Seiten | Gesamt 10 Seiten | |
PDF Download | [ MTV32N20E Schematic.PDF ] |
Teilenummer | Beschreibung | Hersteller |
MTV32N20E | TMOS POWER FET 32 AMPERES 200 VOLTS RDS(on) = 0.075 OHM | Motorola Semiconductors |
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