XQ4010E Datasheet PDF - Xilinx
| Part Number | XQ4010E | |
| Description | QPRO XQ4000E/EX QML High-Reliability FPGAs | |
| Manufacturers | Xilinx | |
| Logo |  |
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R QPRO XQ4000E/EX
QML High-Reliability FPGAs
DS021 (v2.2) June 25, 2000
02
Product Features
• Certified to MIL-PRF-38535, appendix A QML
(Qualified Manufacturers Listing)
• Also available under the following Standard Microcircuit
Drawings (SMD)
- XC4005E 5962-97522
- XC4010E 5962-97523
- XC4013E 5962-97524
- XC4025E 5962-97525
- XC4028EX 5962-98509
• For more information contact the Defense Supply
Center Columbus (DSCC)
http://www.dscc.dla.mis/v/va/smd/smdsrch.html
• System featured Field-Programmable Gate Arrays
- Select-RAMTM memory: on-chip ultra-fast RAM with
· Synchronous write option
· Dual-port RAM option
- Abundant flip-flops
- Flexible function generators
- Dedicated high-speed carry logic
- Wide edge decoders on each edge
- Hierarchy of interconnect lines
- Internal 3-state bus capability
- Eight global low-skew clock or signal distribution
networks
• System Performance beyond 60 MHz
• Flexible Array Architecture
• Low Power Segmented Routing Architecture
• Systems-Oriented Features
- IEEE 1149.1-compatible boundary scan logic
support
- Individually programmable output slew rate
- Programmable input pull-up or pull-down resistors
- 12 mA sink current per XQ4000E/EX output
Product Specification
• Configured by Loading Binary File
- Unlimited reprogrammability
• Readback Capability
- Program verification
- Internal node observability
• Backward Compatible with XC4000 Devices
• Development System runs on most common computer
platforms
- Interfaces to popular design environments
- Fully automatic mapping, placement and routing
- Interactive design editor for design optimization
• Available Speed Grades:
- XQ4000E -3 for plastic packages only
- -4 for ceramic packages only
- XQ4028EX -4 for all packages
More Information
For more information refer to Xilinx XC4000E and XC4000X
series Field Programmable Gate Arrays product specifica-
tion. This data sheet contains pinout tables for XQ4010E
only. Refer to Xilinx web site for pinout tables for other
devices. (Pinouts for XQ4000E/EX are identical to
XC4000E/EX.)
(http://www.xilinx.com/partinfo/databook.htm)
© 2000 Xilinx, Inc. All rights reserved. All Xilinx trademarks, registered trademarks, patents, and disclaimers are as listed at http://www.xilinx.com/legal.htm.
All other trademarks and registered trademarks are the property of their respective owners. All specifications are subject to change without notice.
DS021 (v2.2) June 25, 2000
Product Specification
www.xilinx.com
1-800-255-7778
1
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R QPRO XQ4000E/EX QML High-Reliability FPGAs
XQ4000E Horizontal Longline Switching Characteristic Guidelines
Testing of switching parameters is modeled after testing
methods specified by MIL-M-38510/605. All devices are
100% functionally tested. Internal timing parameters are
derived from measuring internal test patterns. Listed below
are representative values. For more specific, more precise,
and worst-case guaranteed data, use the values reported
by the static timing analyzer (TRCE in the Xilinx Develop-
ment System) and back-annotated to the simulation netlist.
These path delays, provided as a guideline, have been
extracted from the static timing analyzer report. All timing
parameters assume worst-case operating conditions (sup-
ply voltage and junction temperature). Values apply to all
XQ4000E devices unless otherwise noted.
The following guidelines reflect worst-case values over the
recommended operating conditions.
-3 -4
Symbol
Description
Device
Max Max
TBUF Driving a Horizontal Longline (LL):
TIO1
I going High or Low to LL going High or Low, while T is Low.
Buffer is constantly active.(1)
XQ4005E
XQ4010E
- 5.0
6.4 8.0
XQ4013E 7.2 9.0
XQ4025E
- 11.0
TIO2 I going Low to LL going from resistive pull-up High to active Low.
TBUF configured as open-drain.(1)
XQ4005E
XQ4010E
- 6.0
6.9 10.5
XQ4013E 7.7 11.0
XQ4025E
- 12.0
TON T going Low to LL going from resistive pull-up or floating High to
active Low. TBUF configured as open-drain or active buffer with
I = Low.(1)
XQ4005E
XQ4010E
XQ4013E
- 7.0
7.3 8.5
7.5 8.7
XQ4025E
- 11.0
TOFF T going High to TBUF going inactive, not driving LL.
XQ4005E
XQ4010E
- 1.8
1.5 1.8
XQ4013E 1.5 1.8
XQ4025E
- 1.8
TPUS
T going High to LL going from Low to High, pulled up by a single
resistor.(1)
XQ4005E
XQ4010E
- 23.0
22.0 29.0
XQ4013E 26.0 32.0
XQ4025E
- 42.0
TPUF
T going High to LL going from Low to High, pulled up by two
resistors.(1)
XQ4005E
XQ4010E
- 10.0
11.0 13.5
XQ4013E 13.0 15.0
XQ4025E
- 18.0
Notes:
1. These values include a minimum load. Use the static timing analyzer to determine the delay for each destination.
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DS021 (v2.2) June 25, 2000
Product Specification
www.xilinx.com
1-800-255-7778
5
Preview 5 Page |
Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for XQ4010E electronic component. |
| Information | Total 30 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ XQ4010E.PDF Datasheet ] | |
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