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PDF KM23V8105G Data sheet ( Hoja de datos )
| Número de pieza | KM23V8105G | |
| Descripción | 8M-Bit (1Mx8 /512Kx16) CMOS MASK ROM | |
| Fabricantes | Samsung semiconductor | |
| Logotipo |  |
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KM23V8105D(G)
CMOS MASK ROM
8M-Bit (1Mx8 /512Kx16) CMOS MASK ROM
FEATURES
• Switchable organization
1,048,576 x 8(byte mode)
524,288 x 16(word mode)
• Random access time/Page Access Time
3.3V Operation : 100/30ns(Max.)
3.0V Operation : 120/50ns(Max.)
• 4 Words / 8 bytes page access
• Supply voltage : single +3.0V/ single +3.3V
• Current consumption
Operating : 40mA(Max.)
Standby : 30µA(Max.)
• Fully static operation
• All inputs and outputs TTL compatible
• Three state outputs
• Package
-. KM23V8105D : 42-DIP-600
-. KM23V8105DG : 44-SOP-600
GENERAL DESCRIPTION
The KM23V8105D(G) is a fully static mask programmable ROM
fabricated using silicon gate CMOS process technology, and is
organized either as 1,048,576 x 8 bit(byte mode) or as 524,288
x 16 bit(word mode) depending on BHE voltage level.(See
mode selection table)
This device includes PAGE read mode function, page read
mode allows 4 words(or 8 bytes) of data to read fast in the
same page, CE and A2 ~ A18 should not be changed.
This device operates with 3.0V or 3.3V power supply, and all
inputs and outputs are TTL compatible.
Because of its asynchronous operation, it requires no external
clock assuring extremely easy operation.
It is suitable for use in program memory of microprocessor, and
data memory, character generator.
The KM23V8105D is packaged in a 42-DIP and the
KM23V8105DG in a 44-SOP.
FUNCTIONAL BLOCK DIAGRAM
PIN CONFIGURATION
A18
.
.
.
.
.
.
.
.
A2
A0~A1
A-1
X
BUFFERS
AND
DECODER
Y
BUFFERS
AND
DECODER
MEMORY CELL
MATRIX
(524,288x16/
1,048,576x8)
SENSE AMP.
DATA OUT
BUFFERS
...
CE
OE
BHE
CONTROL
LOGIC
Q0/Q8 Q7/Q15
Pin Name
A0 - A1
A2 - A18
Q0 - Q14
Q15 /A-1
BHE
CE
OE
VCC
VSS
N.C
Pin Function
Page Address Inputs
Address Inputs
Data Outputs
Output 15(Word mode)/
LSB Address(Byte mode)
Word/Byte selection
Chip Enable
Output Enable
Power
Ground
No Connection
A18 1
A17 2
A7 3
A6 4
A5 5
A4 6
A3 7
A2 8
A1 9
A0 10
CE 11
VSS 12
OE 13
Q0 14
Q8 15
Q1 16
Q9 17
Q2 18
Q10 19
Q3 20
Q11 21
DIP
42 N.C
41 A8
N.C 1
A18 2
40 A9
A17 3
39 A10
A7 4
38 A11
A6 5
37 A12
A5 6
36 A13
A4 7
35 A14
A3 8
34 A15
A2 9
33 A16
A1 10
32 BHE
A0 11
31 VSS
CE 12
30 Q15/A-1 VSS 13
29 Q7
OE 14
28 Q14
Q0 15
27 Q6
26 Q13
25 Q5
24 Q12
23 Q4
22 VCC
Q8 16
Q1 17
Q9 18
Q2 19
Q10 20
Q3 21
Q11 22
KM23V8105D
SOP
44 N.C
43 N.C
42 A8
41 A9
40 A10
39 A11
38 A12
37 A13
36 A14
35 A15
34 A16
33 BHE
32 VSS
31 Q15/A-1
30 Q7
29 Q14
28 Q6
27 Q13
26 Q5
25 Q12
24 Q4
23 VCC
KM23V8105DG
1 page  
KM23V8105D(G)
PACKAGE DIMENSIONS
42-DIP-600
#42
13.80±0.20
0.543±0.008
#1
(
0.81
0.032
)
44-SOP-600
#44
CMOS MASK ROM
#22
0.25
+0.10
-0.05
0.010 +-00..000024
52.82
2.080
MAX
52.42±0.20
2.064±0.008
#21 0~15°
3.91±0.20
0.154±0.008
05..20080MAX
0.46±0.10
0.018±0.004
1.27±.10
0.050±0.004
2.54
0.100
#23
3.1±0.30
0.122±0.012
0.38
0.015
MIN
0~8°
16.04±0.30 12.60±0.20
0.631±0.012 0.496±0.008
#1
(
0.915
0.036
)
28.95
1.140
MAX
28.50±0.20
1.122±0.008
0.40
+0.100
-0.050
0.016+-00..000024
#22
0.20
+0.10
-0.05
0.008+-00.0.00024
2.80±0.20
0.110±0.008
3.10
0.122MAX
0.10 MAX
0.004 MAX
0.80±0.20
0.031±0.008
1.27
0.050
00..00052MIN
5 Page | ||
| Páginas | Total 5 Páginas | |
| PDF Descargar | [ Datasheet KM23V8105G.PDF ] | |
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