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PM100RLA060 Schematic ( PDF Datasheet ) - Mitsubishi Electric Semiconductor

Teilenummer PM100RLA060
Beschreibung General purpose inverter / servo drives and other otor controls
Hersteller Mitsubishi Electric Semiconductor
Logo Mitsubishi Electric Semiconductor Logo 




Gesamt 6 Seiten
PM100RLA060 Datasheet, Funktion
MITSUBISHI <INTELLIGENT POWER MODULES>
PM100RLA060
FLAT-BASE TYPE
INSULATED PACKAGE
PM100RLA060
FEATURE
a) Adopting new 5th generation IGBT (CSTBT) chip, which
performance is improved by 1µm fine rule process.
For example, typical Vce(sat)=1.5V @Tj=125°C
b) I adopt the over-temperature conservation by Tj detection of
CSTBT chip, and error output is possible from all each con-
servation upper and lower arm of IPM.
c) New small package
Reduce the package size by 10%, thickness by 22% from
S-DASH series.
d) Current rating of brake part increased.
50% for the current rating of inverter part.
• 3φ 100A, 600V Current-sense IGBT type inverter
• 50A, 600V Current-sense regenerative brake IGBT
• Monolithic gate drive & protection logic
• Detection, protection & status indication circuits for, short-
circuit, over-temperature & under-voltage (P-Fo available
from upper arm devices)
• Acoustic noise-less 11kW class inverter application
APPLICATION
General purpose inverter, servo drives and other motor controls
PACKAGE OUTLINES
11
7
19.75
19.75 3.25 16
3-2
120
106
16 16
3-2 3-2
15.25
6-2
2-φ5.5
MOUNTING HOLES
Dimensions in mm
16
3
1 5 9 13 19
6-M5 NUTS
B
10.75
32.75
U VW
23 23
19-s0.5
12
23
22
+
1
0.5
Terminal code
1. VUPC
2. UFO
3. UP
4. VUP1
5. VVPC
6. VFO
7. VP
8. VVP1
9. VWPC
10. WFO
11. WP
12. VWP1
13. VNC
14. VN1
15. Br
16. UN
17. VN
18. WN
19. Fo
Apr. 2004






PM100RLA060 Datasheet, Funktion
MITSUBISHI <INTELLIGENT POWER MODULES>
PM100RLA060
FLAT-BASE TYPE
INSULATED PACKAGE
¡
VD I F
VD
20kΩ ≥10µ
0.1µ
VUP1
Fo Rfo
UP
VUPC
VVP1
Fo Rfo
VP
VVPC
VD
¡
IF
VWP1
Fo Rfo
WP
VWPC
20k
10µ
UN
0.1µ
20k
¡ 10µ
I F VN
0.1µ
20k
VN1
¡ 10µ
VD I F
WN
¡ 4.7k
IF
0.1µ
5V 1k
VNC
Br
Fo Rfo
Vcc OT
OUT
Fo
Si
In
GND GND
Vcc OT
OUT
Fo Si
In
GND GND
Vcc OT
OUT
Fo Si
In
GND GND
OT
Vcc OUT
Fo
Si
In
GND GND
OT
Vcc OUT
Fo Si
In
GND GND
Vcc OT
Fo OUT
Si
In
GND GND
Vcc OT
Fo OUT
Si
In
GND GND
P
+
U
VM
W
N
B
: Interface which is the same as the U-phase
Fig. 8 Application Example Circuit
NOTES FOR STABLE AND SAFE OPERATION ;
Design the PCB pattern to minimize wiring length between opto-coupler and IPM’s input terminal, and also to minimize the
stray capacity between the input and output wirings of opto-coupler.
Connect low impedance capacitor between the Vcc and GND terminal of each fast switching opto-coupler.
Fast switching opto-couplers: tPLH, tPHL 0.8µs, Use High CMR type.
Slow switching opto-coupler: CTR > 100%
Use 4 isolated control power supplies (VD). Also, care should be taken to minimize the instantaneous voltage charge of the
power supply.
Make inductance of DC bus line as small as possible, and minimize surge voltage using snubber capacitor between P and N
terminal.
Use line noise filter capacitor (ex. 4.7nF) between each input AC line and ground to reject common-mode noise from AC line
and improve noise immunity of the system.
Apr. 2004

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