|
|
Teilenummer | 79RC32332 |
|
Beschreibung | IDT79RC32332 | |
Hersteller | IDT | |
Logo | ||
Gesamt 30 Seiten www.DataSheet4U.com
IDT79RC32334 and IDT79RC32332
Integrated Communications
Processors
(Y Revision)
RISCore™ 32300 Family
www. User Reference ManualJune2002
DataS 2975 Stender Way, Santa Clara, California 95054
Telephone: (800) 345-7015 • TWX: 910-338-2070 • FAX: (408) 330-1748
h Printed in U.S.A.
eet4U.com©2001 Integrated Device Technology, Inc.
About This Manual
Notes
www.DataSheet4U.com
Revision History
79RC32334/332 User Reference Manual
iv
June 4, 2002
6 Page Table of Contents
Notes
www.DataSheet4U.com
11 Synchronous DRAM
Controller
Introduction ................................................................................................................................ 11-1
Features..................................................................................................................................... 11-1
SDRAM Enhancements in Y Silicon Revision.................................................................. 11-1
Block Diagram ........................................................................................................................... 11-3
Functional Overview .................................................................................................................. 11-3
Base Address Decoding................................................................................................... 11-7
Page Row Comparators................................................................................................... 11-7
Burst Support ................................................................................................................... 11-7
RAS/CAS Address MUX .................................................................................................. 11-8
Refresh Timer................................................................................................................... 11-8
Error Recovery ................................................................................................................. 11-8
SDRAM Initialization .................................................................................................................. 11-8
Register Definitions.................................................................................................................... 11-9
SDRAM Control Registers ....................................................................................................... 11-10
SDRAM Primary Control Register.................................................................................. 11-10
SDRAM Secondary Control Register ............................................................................. 11-13
Timing Diagrams...................................................................................................................... 11-15
SODIMM .................................................................................................................................. 11-21
SODIMM Configuration .................................................................................................. 11-21
SDRAM SODIMM Even Bank Non-Page Word Read.................................................... 11-21
SDRAM SODIMM Odd Bank Non-Page Word Read ..................................................... 11-22
SDRAM SODIMM Refresh............................................................................................. 11-23
output_clk Usage ........................................................................................................... 11-23
12 PCI Interface Controller
Introduction ................................................................................................................................12-1
Features..................................................................................................................................... 12-1
PCI Interface Enhancements in Y Silicon Revision..........................................................12-1
Functional Overview ..................................................................................................................12-3
Memory Mapping .............................................................................................................12-4
RC32334 PCI Bus Target Operation ................................................................................12-5
RC32334 PCI Bus Master Operation ...............................................................................12-6
RC32334 PCI Bus Target Operation ................................................................................12-7
PCI Satellite Mode ...........................................................................................................12-7
PCI Commands Supported ..............................................................................................12-9
PCI Configuration Register Access................................................................................12-10
PCI Polling Error Handling ............................................................................................. 12-11
PCI Interrupts ................................................................................................................. 12-11
Signal Definitions ..................................................................................................................... 12-11
Register Definitions..................................................................................................................12-12
PCI Controller Interrupt Pending Register 11 .................................................................12-13
CPU to PCI Mailbox Interrupt Pending Register 12 .......................................................12-13
PCI to CPU Mailbox Interrupt Pending Register 13 .......................................................12-14
PCI Memory Space [1,2,3] Base Register......................................................................12-14
PCI I/O Base Register....................................................................................................12-15
New Feature Register ....................................................................................................12-16
79RC32334/332 User Reference Manual
x
June 4, 2002
12 Page | ||
Seiten | Gesamt 30 Seiten | |
PDF Download | [ 79RC32332 Schematic.PDF ] |
Teilenummer | Beschreibung | Hersteller |
79RC32332 | IDT79RC32332 | IDT |
79RC32334 | IDT Interprise Integrated Communications Processor | Integrated Device Technology |
Teilenummer | Beschreibung | Hersteller |
CD40175BC | Hex D-Type Flip-Flop / Quad D-Type Flip-Flop. |
Fairchild Semiconductor |
KTD1146 | EPITAXIAL PLANAR NPN TRANSISTOR. |
KEC |
www.Datenblatt-PDF.com | 2020 | Kontakt | Suche |