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Teilenummer | IR1150LS |
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Beschreibung | uPFC One Cycle Control PFC IC | |
Hersteller | International Rectifier | |
Logo | ||
Gesamt 15 Seiten Data Sheet No. PD60230
IR1150S
IR1150IS
µPFC ONE CYCLE CONTROL PFC IC
Features
• PFC with IR proprietary “One Cycle Control”
• Continuous conduction mode (CCM) boost type PFC
• No line voltage sense required
• Programmable switching frequency (50kHz-200kHz)
• Programmable output overvoltage protection
• Brownout and output undervoltage protection
• Cycle-by-cycle peak current limit
• Soft start
• User initiated micropower “Sleep Mode”
Description
• Open loop protection
• Maximum duty cycle limit of 98%
• User programmable fixed frequency operation
• Min. off time of 150-350ns over freq range
• VCC under voltage lockout
• Internally clamped 13V gate drive
• Fast 1.5A peak gate drive
• Micropower startup (<200 µA)
• Latch immunity and ESD protection
Package
The µPFC IR1150 is a power factor correction (PFC) control IC designed to operate in continuous
conduction mode (CCM) over a wide range input line voltages. The IR1150 is based on IR's
proprietary "One Cycle Control" (OCC) technique providing a cost effective solution for PFC.
The proprietary control method allows major reductions in component count, PCB area and
design time while delivering the same high system performance as traditional solutions.
The IC is fully protected and eliminates the often noise sensitive line voltage sensing requirements
of existing solutions.
The IR1150 features include programmable switching frequency, programmable dedicated
8-Lead SOIC
over voltage protection, soft start, cycle-by-cycle peak current limit, brownout, open loop,
UVLO and micropower startup current.
In addition, for low standby power requirements (Energy Star, 1W Standby, Blue Angel, etc.), the IC can be driven into sleep
mode with total current consumption below 200µA, by pulling the OVP pin below 0.62V.
IR1150 Application Diagram
AC LINE
BR ID GE
V OUT
AC NEUTRAL
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IR 11 50
1 COM GATE 8
2 FREQ VCC 7
3 ISNS
VFB 6
4 OVP COMP 5
V cc
+
+
R TN
1
IR1150S/IR1150IS
Block Diagram
OVP/EN 4
1.055VREF
ISNS 3
VFB 6
COMP 5
VREF
FAULT
Vm
1.0V
-
+
RESET
FAULT PROTECTION
OPEN LOOP PROTECTION
OUTPUT UNDER VOLTAGE
FAULT
Lead Assignments & Definitions
BIAS &
REFERENCES
UVLO
SLEEP
0.5V
CLOCK
MAX
DUTY CYCLE
LIMIT
SQ
RQ
FAULT
7 VCC
2 FREQ
8 GATE
1 COM
Lead Assignment
IR1150S
COM 1
8
FREQ 2
I SNS
3
7
6
OVP/EN 4
5
8 LEAD SOIC
GATE
V CC
VFB
COMP
Pin#
1
2
3
4
5
6
7
8
Symbol
Description
COM
FREQ
Ground
Frequency Set
I SNS
OVP/EN
Current Sense
Overvoltage Fault Detect / Enable
COMP Voltage Loop Compensation
VFB
VCC
GATE
Output Voltage Sense
IC Supply Voltage
Gate Drive Output
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6
6 Page IR1150S/IR1150IS
7.10 V
7.05 V
7.00 V
6.95 V
6.90 V
6.85 V
-50 °C
0 °C
50 °C 100 °C
Temperature
Fig. 5 - Reference Voltage
150 °C
50 uS
45 uS
40 uS
35 uS
30 uS
-50 °C
0 °C
50 °C 100 °C
Temperature
150 °C
Fig. 6 - Voltage Error Amplifier
Transconductance
60 uA
2.70
50 uA
40 uA
30 uA
20 uA
IO (source)
IO (sink)
2.60
2.50
2.40
10 uA
-50 °C
0 °C
50 °C 100 °C
Temperature
150 °C
Fig.7 - Voltage Error Amplifier
Source/Sink Current
2.30
-50 °C
0 °C
50 °C 100 °C
Temperature
150 °C
Fig. 8 - Current Sense Amplifier DC Gain
www.irf.com
12
12 Page | ||
Seiten | Gesamt 15 Seiten | |
PDF Download | [ IR1150LS Schematic.PDF ] |
Teilenummer | Beschreibung | Hersteller |
IR1150LS | uPFC One Cycle Control PFC IC | International Rectifier |
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