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PDF ST52T301 Data sheet ( Hoja de datos )
| Número de pieza | ST52T301 | |
| Descripción | 8-Bit OTP/EPROM DuaLogic] MCUs | |
| Fabricantes | ST Microelectronics | |
| Logotipo |  |
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® ST52T301/E301
8-Bit OTP/EPROM DuaLogic™ MCUs WITH ADC,
UART, TIMER, TRIAC & PWM DRIVER
High Speed dedicated structures for Fuzzy Logic
(3.5 µs to compute a 4 In x 1 Out rule)
Capability to perform simple boolean and
arithmetic operations
Up to 4 Input, 2 Output ConfigurableVariables for
each Fuzzy Algorithm and up to 300 Rules
Up to 16 Triangularand TrapezoidalMembership
Functions for each Input variable
Up to 256 Singleton Membership Functions for
all Consequents
Program and Data EPROM: 2 Kbytes
16 general purpose registers available as
Register File
Working Clock Frequencies: 5, 10 and 20MHz
On-Chip Clock Oscillator driven by Quartz
Crystal or Ceramic Resonator
One external interrupt
Standard TTL compatible input
CMOS compatible output
4 channel 8 bit Analog to Digital Converter
Bandgap reference 2.5V
Digital 8 bit I/O port indepedently programmable
with handshake signal
Serial Communication Interface with
asynchronous protocol (UART)
Programmable Timer with internal Prescaler
Internal Power Fuzzy Control to drive external
Triac (up to 25mA source, 50 mA sink current)
Internal Fuzzy controlled PWM to drive an
external power device
Software tools and Emulators availability
Windowed and One Time Programmable (OTP)
Memory parts available for prototyping and
production phases
44 pin Plastic (PLCC44) and Ceramic Windowed
Leaded Chip Carrier (CLCC44-W)
ADVANCED DATA SHEET
CLCC44-W
PLCC44
1.1 GENERAL DESCRIPTION
ST52E301 (1) and ST52T301 (1) devices are
members of the W.A.R.P.family of 8-bit DuaLogic™
microcontrollers. They are able to perform, in an
efficient way, both booleanand fuzzy algorithms, in
order to reach the best performances that the two
methodologies allow.
TheST52E301is the erasableEPROMversion and
the ST52T301 is the OTP version.
The ST52x301 is completely developed and
produced by STMicroelectronics using the reliable
high performance CMOSM5E (O.7µm) process.
Thanks to Fuzzy Logic, ST52x301 allows to
describe a problemusing a linguistic model instead
of a mathematicalmodel.In thisway it is very useful
and easy to modelize complex system with very
high accuracy.
The linguistic approach is based on a set of
IF-THEN rules, describing the control behaviour,
and on Membership Functions associated to input
and output variables.
Fuzzy Inference is a set of operations which
computes the output values according with the
truth values of the involved rules.
July 1998
Note: (1) Formerly W.A.R.P.3TC
1/99
1 page  
ST52T301/E301
1.2 PIN DESCRIPTION
VDD, EVDD, VSS, EVSS, AVDD, AVSS, VPP. In order to
avoid noise disturbances, the power supply of the
digital part is kept separated from the power supply
of the analog part.
VDD. Main Power Supply Voltage (5V 10%).
VSS. Digital circuit Ground.
EVDD. EPROM Main Power Supply Voltage (5V
10%).
EVSS. EPROM Digital circuit Ground.
AVDD. Analog VDD of the Analog to Digital
Converter.
AVSS.AnalogVSS of theAnalogto DigitalConverter.
Must be tied to VSS.
VPP. Main Power Supply for the internal EPROM
(12.5V 5%).
OSCin and OSCout. These pins are internally
connected with the on-chip oscillator circuit. A
quar tz crystal or a ceramic resonator can be
connectedbetween these two pins in order to allow
the correct operations of ST52x301 with various
stability/cost trade-offs. An external clock signal
can be applied to OSCin, in this case OSCout must
be grounded.
RESET. This signal is used to restart ST52x301 at
the beginningof its program.It also allows to select
the program mode for the EPROM.
INT. External interrupt active on rising or falling
edge.
AIN0-AIN3. These 4 lines are connected to the
inputs of the analog multiplexer. They allow to
acquire 4 analog inputs.
BG. A Voltageequal to 2.5V is available on this pin.
It can be used for Analog signal conditioning.
P0-P7. These 8 lines are organizedas one I/O port.
During the Programming phase such port is used
for the EPROM data read/write.
READY. Handshake signal of the parallel port.
P8. Digital output.
TxD. Serial data output of the SCI transmitter
block.
RxD. Serial data input of the SCI receiver
block.
TRES, TCLK, TCTRL, TIMEROUT. These pins are
related with the internal Programmable Timer. The
Timer can be reset externally by using TRES. In
Working Mode, TRES resets the address counter
of the Timer. TRES is active at low level
The Timer Clock can be the internal clock or can
be supplied externally by using the pin TCLK.
An external Start/Stopsignal can be used to control
the Timer throughthe pin TCTRL.The Timeroutput
is available on the pin TIMEROUT.
MAIN1, MAIN2, TRIACOUT. ST52x301 is able to
drive a TRIAC in two different modes: Burst mode
or Phase Angle Partialization control mode.
The Burst mode is used for thermal regulation.
MAIN1 and MAIN2 signals are used to detect the
zero crossing of the main voltage.
Thepulse to drivethe TRIACis givenby TRIACOUT
pin.
It is possible to use the same pins to implement a
PWM Driver. In this case it is possible to fix the
period of PWM and to changethe duty cycle on fly.
The PWM output is given by TRIACOUT pin.
CE, OE, ERES, CADD, VPP. These pins are used
to manage the EPROM during the Programming
phase. During the Programming phase
(programming) VPP must be set at 12V. In the
Working phase VPP must be equal to VDD.
ERES in Programming Mode resets the address
counter of the EPROM; it is active at high level.
In the Working phase OE, CE and CADD are used
like handshaking signals for the parallel port.
MODE. I t s elec ts t h e fun ct ion ment mo d e
(Programming or Working mode).
TEST. It enables the testing functionalities; during
the Programming and Working phaseit must be set
to 0.
5/99
5 Page 
Figure 2.6. TMR_ADC_ST Registers
ST52T301/E301
Figure 2.7. SCI_ST Registers
11/99
11 Page | ||
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| PDF Descargar | [ Datasheet ST52T301.PDF ] | |
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