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PDF SY100E136 Data sheet ( Hoja de datos )

Número de pieza SY100E136
Descripción 6-BIT UNIVERSAL UP/DOWN COUNTER
Fabricantes Micrel Semiconductor 
Logotipo Micrel Semiconductor Logotipo



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No Preview Available ! SY100E136 Hoja de datos, Descripción, Manual

6-BIT UNIVERSAL
UP/DOWN COUNTER
SY10E136
SY100E136
FEATURES
s 550MHz count frequency
s Extended 100E VEE range of –4.2V to –5.5V
s Look-ahead-carry input and output
s Fully synchronous up and down counting
s Asynchronous Master Reset
s Internal 75Kinput pull-down resistors
s Available in 28-pin PLCC package
PIN CONFIGURATION
D2
S2
S1
VEE
CLK
CIN
CLIN
25 24 23 22 21 20 19
26 18
27 17
28
PLCC
16
1
TOP VIEW
15
J28-1
2 14
3 13
4 12
5 6 7 8 9 10 11
Q3
Q2
VCC
VCCO
COUT
COUT
CLOUT
PIN NAMES
Pin
D0–D5
Q0–Q5
S1, S2
MR
CLK
COUT, COUT
CLOUT
CIN
CLIN
VCCO
Function
Preset Data Inputs
Differential Data Outputs
Mode Control Pins
Master Reset
Clock Input
Carry Out Output (Active LOW)
Look-Ahead-Carry Output
Carry-In Input (Active LOW)
Look-Ahead-Carry Input
VCC to Output
DESCRIPTION
The SY10/100E136 are 6-bit synchronous, presettable,
cascadable universal counters. These devices generate
a look-ahead-carry output and accept a look-ahead-carry
input. These two features allow for the cascading of
multiple E136s for wider bit width counters that operate
at very nearly the same frequency as the stand-alone
counter.
The CLOUT output will pulse LOW for one clock cycle
one count before the E136 reaches terminal count. The
COUT output will pulse LOW for one clock cycle when
the counter reaches terminal count. For more information
on utilizing the look-ahead-carry features of the device,
please refer to the applications section of this data sheet.
The differential COUT output facilitates the E136's use in
programmable divider and self-stopping counter
applications.
Unlike the H136 and other similar universal counter
designs, the E136 carry-out and look-ahead-carry-out
signals are registered on chip. This design alleviates the
glitch problem seen on many counters where the carry-
out signals are merely gated. Because of this architecture,
there are some minor functional differences between the
E136 and H136 counters. The user, regardless of
familiarity with the H136, should read this data sheet
carefully. Note specifically (see block diagram) the
operation of the carry-out outputs and the look-ahead-
carry-in input when utilizing the Master Reset.
When left open, all of the input pins will be pulled
LOW via an input pulldown resistor. The Master Reset is
an asynchronous signal which, when asserted, will force
the Q outputs LOW.
The Q outputs need not be terminated for the E136 to
function properly. In fact, if these outputs will not be
used in a system, it is recommended that they be left
open to save power and minimize noise. This practice
will minimize switching noise which can reduce the
maximum count frequency of the device, or significantly
reduce margins against other noise in the system.
Rev.: C Amendment: /1
1 Issue Date: February, 1998

1 page




SY100E136 pdf
Micrel
SY10E136
SY100E136
LAOPGPLICICDAITAIGORNASMINFORMATION
Overview
The SY10E/100E136 are 6-bit synchronous, presettable,
cascadable universal counters. Using the S1 and S2 control
pins, the user can select between preset, count up, count
down and hold count. The Master Reset pin will reset the
internal counter and set the COUT, CLOUT and CLIN flip-
flops. Unlike previous 136-type counters, the carry-out
outputs will go to a high state during the preset operation.
In addition, since the carry-out outputs are registered, they
will not go low if terminal count is loaded into the register.
The look-ahead-carry-out output functions similarly.
Note from the schematic the use of the master information
from the least significant bits for control of the two carry-out
functions. This architecture not only reduces the carry-out
delay, but is essential to incorporate the registered carry-
out functions. In addition to being faster, the resulting carry-
out signals are stable and glitch free because these functions
are registered.
Cascading Multiple E136 Devices
Many applications require counters significantly larger than
the 6 bits available with the E136. For these applications,
several E136 devices can be cascaded to increase the bit
width of the counter to meet the needs of the application.
In the past, cascading several 136-type universal counters
necessarily impacted the maximum count frequency of the
resulting counter chain. This performance impact was the
result of the terminal count signal of the lower order counters
having to ripple through the entire counter chain. As a
result, past counters of this type were not widely used in
large bit counter applications.
An alternative counter architecture similar to the E016
binary counter was implemented to alleviate the need to
ripple propagate the terminal count signal. Unfortunately,
these types of counters require external gating for cascading
designs of more than two devices. In addition to requiring
additional components, these external gates limit the
cascaded count frequency to a value less than the free
running count frequency of a single counter. Although there
is a performance impact with this type of architecture, it is
minor compared to the impact of the ripple propagate
designs. As a result, the E016-type counters have been
used extensively in applications requiring very high speed,
wide bit width synchronous counters.
Several improvements have been incorporated to past
universal counter designs in the E136 universal counter.
These enhancements make the E136 the unparalleled leader
in its class. With the addition of look-ahead-carry features
on the terminal count signal, very large counter chains can
be designed which function at very nearly the same clock
frequency as a single free running device. More importantly,
these counter chains require no external gating. Figure 1
below illustrates the interconnect scheme for using the look-
ahead-carry features of the E136 counter.
Q0 Q5
Q0 Q5
Q0 Q5
Q0 Q5
CLOCK
"LO"
"LO"
CLK
CLK
LSB
CIN
CLIN
COUT "LO"
CLOUT
CIN COUT
CLIN CLOUT
CLK
CIN COUT
CLIN CLOUT
CLK
MSB
CIN COUT
CLIN CLOUT
D0 D5
D0 D5
D0 D5
D0 D5
CLK
CLOUT
111101
111110
111111
000000
000001
COUT
Figure 1. 24-bit Cascaded E136 Counter
5

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