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MSM6665C-xx Schematic ( PDF Datasheet ) - OKI electronic componets

Teilenummer MSM6665C-xx
Beschreibung DOT MATRIX LCD CONTROLLER WITH 17-DOT COMMON DRIVER AND 80-DOT SEGMENT DRIVER
Hersteller OKI electronic componets
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Gesamt 30 Seiten
MSM6665C-xx Datasheet, Funktion
FEDL6665C-02
FEDL6665C-02
¡¡SemicondSucetormiconductor
MSM6665C-xx
This versioMn:SMAu6g6.6250C0-0xx
Previous version: Nov. 1997
DOT MATRIX LCD CONTROLLER WITH 17-DOT COMMON DRIVER AND 80-DOT SEGMENT
DRIVER
GENERAL DESCRIPTION
The MSM6665C-xx is a dot-matrix LCD control driver which has functions of displaying
characters, cursor and arbitrators.
The MSM6665C-xx is provided with a 17-dot common driver, 80-dot segment driver, display
RAM and character ROM, and is controlled with the commands from the serial interface.
The character ROM can change the font data by mask option.
The MSM6665C-02 has standard ROM with 256 different character fonts.
The MSM6665C-xx can drive a variety of LCD panels because the bias voltage, which determines
the LCD driving voltage, can be optionally supplied from the external source.
FEATURES
• Serial interface
• Contains a 17-dot common driver and an 80-dot segment driver.
• Contains ROM with character fonts of (5 x 7 dots) x 256.
• A built-in RC oscillator circuit.
• Provided with 80-dot arbitrators.
• Switchable between 1/9 duty (1 line; characters + cursor + arbitrator) and 1/17 duty (2 lines;
characters + cursor, 1 line; arbitrator).
• Character blink operation can be switched between all-characters lighting-on mode and all-
characters lighting-off mode.
• SiG C-MOS process
• Arbitrator blink operation can be switched between 5-dot unit mode and 1-dot unit mode.
• Package options :
128-pin plastic QFP (QFP128-P-1420-0.50-K) (Product name: MSM6665C-xxGS-K)
Aluminum pad chip
(Product name: MSM6665C-xx)
xx indicates code number.
1/31






MSM6665C-xx Datasheet, Funktion
¡ Semiconductor
AC Characteristics
Parameter
CS Setup Time
CS Hold Time
SO ON Delay Time
SO OFF Delay Time
SO Output Delay Time
Input Setup Time
Input Hold Time
Input Waveform Rise Time, Fall Time
Reset Pulse Input Pulse Width
Symbol
tCS
tCH
tON
tOFF
tDLY
tIS
tIH
tr, tf
tRT
Condition
CL=45pF
All inputs
FEDL6665C-02
MSM6665C-xx
(VDD=2.5 to 5.5V, Ta=–40 to +85°C)
Min. Max. Unit
300 —
200 —
— 200
— 200 ns
0 200
200 —
200 —
100
5 — µs
CS
SI
C/D
SHT
"Z"
SO
t ON
RST
VIH2
VIL2
t IS
t CS
VIH2
VIL2
t IH
VIH2
VIL2
VOH
VOL
t DLY
VIL2
t RT
VIH2
VIL2
t CH
t OFF
* VIH2=0.8VDD
VIL2=0.2VDD
VOH=VDD–0.5V
VOL=0.5V
"Z"
Oscillation circuit
RS
R
OSC1
OSC2
C OSC3
6/31

6 Page









MSM6665C-xx pdf, datenblatt
¡ Semiconductor
FEDL6665C-02
MSM6665C-xx
Command Description
[D7, D6, D5, D4, D3, D2, D1, D0], X=don’t care
• LPA (Load Pointer Address)
[1,1,A5,A4,A3,A2,A1,A0]
The command sets "address" data into the address pointer to specify an address on
which command execution affects and an address where display data is stored. The
"address" is a number between 0 and 2FH, given by A0 through A5 in hexadecimal.
When addresses 30H through 3FH are specified, display data and CHB, CSC, CSB, CCB
commands become invalid through an address pointer is set up. Normally, the address
pointer is a loop of 0H through 2FH.
• LOT (Load Option)
[1,0,1,1,X,X,I1,I0]
This command indicates some specific operation of display at the current address which
is performed each time of AINC command execution.
Operation is specified by bit I1 and I0 of the command.
I1 I0
Operation
0 0 Operation is cancelled. (No operation)
0 1 Hereafter, equivalent to writing blank code at each AINC execution.
1 0 Hereafter, Cursor-off and blink-cancellation are executed at each AINC execution.
1 1 Both of above two operations are made.
Note: When blink-cancellation is executed, all RAM data, which controls blinks for each bit
of the arbitrator, go zeros.
• BKCG 1/0 (Bank Change 1/0)
[1,0,0,X,0,0,0,1/0]
Command used to do switching between display address groups (switching between
BANKs), which is valid only when 1/9duty display is selected.
When D0 is "0", display address range becomes 0 through 15, and 32 through 47.
When D0 is "1", display address range becomes 16 through 31, and 32 through 47.
Command execution and display data setting are not affected by Bank setting.
The D0 status is not changed by Reset inputting. The D0 status is unknown when the
system is powered on. So D0 must be set to "0" or "1" with the command.
• SOE/D (Serial Out Enable/Disable)
[1,0,0,X,0,1,1,1/0]
Command used to control the impedance of SO output pin.
When D0 is "1", display data is output via SO pin. When D0 is "0", SO pin goes to high
impedance.
The D0 status is not changed by Reset inputting. The D0 status is unknown when the
system is powered on. So D0 must be set to "0" or "1" with the command.
12/31

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