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MSM66V84B Schematic ( PDF Datasheet ) - OKI electronic componets

Teilenummer MSM66V84B
Beschreibung 4194304-word x 1-bit Serial Register
Hersteller OKI electronic componets
Logo OKI electronic componets Logo 




Gesamt 11 Seiten
MSM66V84B Datasheet, Funktion
E2D0036-39-21
¡¡SemicondSucetormiconductor
MSM66V84B
4,194,304-word x 1-bit Serial Register
This versionM: SFMeb6. 61V99894B
Previous version: May. 1997
GENERAL DESCRIPTION
MSM66V84B is a serial register organized as 4,194,304 words x one bit, characterized by medium-
speed, low power consumption operation.
This device has a built-in internal address generation circuit allowing continuous serial read/write
operation by external clock input.
Read/write operation causes the internal address to be incremented automatically by +1.
External address input enables addressing in units of 1024 words. Furthermore, a refresh timer and
a refresh address counter are installed, which makes an external refresh circuit unnecessary. In
addition, this configuration allows lower power consumption.
The device is packaged in 26/20-pin SOJ or 26/20 TSOP having a width of 300 mil.
It is well adapted for storing much data by means of a battery backup. Its combination with our
recording and playback LSI enables the easy implementation of a solid recording and playback
system.
FEATURES
• Configuration
4,194,304 x 1 bit
• Serial access operation
Serial access time
: 1.5 ms
Serial read/write time : 2.5 ms
• Low current drain
100 mA max. (VCC = 3.6 V with data stored and under standard conditions)
• Refresh operation
A self-refresh function is supported.
• Wide operation voltage range
Single 2.7 to 3.6 V
• Addressing
Units of 1024 words
• Process
0.45 mm double well CMOS process
• Package options :
26/20-pin plastic SOJ (SOJ26/20-P-300-1.27) (Product name : MSM66V84BJS)
26/20-pin plastic TSOP (TSOPII26/20-P-300-1.27-K) (Product name : MSM66V84BTS-K)
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MSM66V84B Datasheet, Funktion
CS
RWCK
SAS
SAD
TAS
WE
tSSC
tSAS tSAP
tAS tAH
A0
A1
DIN
DOUT
tRWC
tTRS tRW
tRWP
A12
tATS
tTAS
tRRS
tRRH
tRWL
tRWD tWP
tWRS
tWRH
tACC tOFF
n
tDS tDH
n+1
n+1
tDS tDH
n+2

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