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MC44602 Schematic ( PDF Datasheet ) - Motorola Semiconductors
| Teilenummer | MC44602 |
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| Beschreibung | HIGH PERFORMANCE CURRENT MODE CONTROLLER | |
| Hersteller | Motorola Semiconductors | |
| Logo |  |
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Gesamt 18 Seiten 
Order this document by MC44602/D
High Performance
Current Mode Controller
MC44602
The MC44602 is an enhanced high performance fixed frequency current
mode controller that is specifically designed for off–line and high voltage
dc–to–dc converter applications. This device has the unique ability of
changing operating modes if the converter output is overloaded or shorted,
offering the designer additional protection for increased system reliability.
The MC44602 has several distinguishing features when compared to
conventional current mode controllers. These features consist of a foldback
amplifier for overload detection, valid load and demag comparators with a
fault latch for short circuit detection, thermal shutdown, and separate high
current source and sink outputs that are ideally suited for driving a high
voltage bipolar power transistor, such as the MJE18002, MJE18004, or
MJE18006.
Standard features include an oscillator with a sync input, a temperature
compensated reference, high gain error amplifier, and a current sensing
comparator. Protective features consist of input and reference undervoltage
lockouts each with hysteresis, cycle–by–cycle current limiting, a latch for
single pulse metering, and a flip–flop which blanks the output off every other
oscillator cycle, allowing output deadtimes to be programmed from 50% to
70%. This device is manufactured in a 16 pin dual–in–line heat tab package
for improved thermal conduction.
• Separate High Current Source and Sink Outputs Ideally Suited for
Driving Bipolar Power Transistors: 1.0 A Source, 1.5 A Sink
• Unique Overload and Short Circuit Protection
• Thermal Protection
• Oscillator with Sync Input
• Current Mode Operation to 500 kHz Output Switching Frequency
• Output Deadtime Adjustable from 50% to 70%
• Automatic Feed Forward Compensation
• Latching PWM for Cycle–By–Cycle Current Limiting
• Input and Reference Undervoltage Lockouts with Hysteresis
• Low Startup and Operating Current
Vref
16
Sync Input
7
RT/CT
8
Compensation
1
Voltage Feedback–Input
3
Simplified Block Diagram
Vref
Undervoltage
Lockout
5.0V
Reference
VCC
Undervoltage
Lockout
Short Circuit
Detection
Oscillator
Error
Amplifier
Flip Flop
and
Latching
PWM
Foldback
Amplifier
Thermal
Gnd 9
15 VCC
Load Detect Input
2
14 VC
Source Output
11
Sink Output
10
Sink Ground
4, 5, 12, 13
Current Sense Input
6
HIGH PERFORMANCE
CURRENT MODE
CONTROLLER
SEMICONDUCTOR
TECHNICAL DATA
16
1
P2 SUFFIX
PLASTIC PACKAGE
CASE 648C
DIP (12 + 2 + 2)
PIN CONNECTIONS
Compensation 1
Load Detect Input 2
Voltage Feedback Input 3
Sink Gnd
4
5
16 Vref
15 VCC
14 VC
13
Sink Gnd
12
Current Sense Input 6
Sync Input 7
RT/CT 8
11 Source Output
10 Sink Output
9 Gnd
(Top View)
ORDERING INFORMATION
Operating
Device Temperature Range
Package
MC44602 TA = – 25 to 85°C DIP (12 + 2 + 2)
MOTOROLA ANALOG IC DEVICE DATA
© Motorola, Inc. 1996
Rev 0
1
 
MC44602
Figure 9. Voltage Feedback Input,
Voltage versus Current
2.6
VClamp = 1.0 V
2.2
VCC = 12 V
TA = 25°C
VClamp = 0.7 V
1.8
VClamp = 0.3 V
1.4
VClamp = 0.5 V
1.0
–500
VClamp = 0.1 V
–400 –300 –200 –100
Iin, INPUT CURRENT (µA)
0
Figure 10. Voltage Feedback Input
versus Current Sense Clamp Level
2.6
VCC = 12 V
2.2
TA = 125°C
1.8
TA = 25°C
TA = –55°C
1.4
1.0
0 0.2 0.4 0.6 0.8
VClamp, CURRENT SENSE CLAMP LEVEL (V)
1.0
Figure 11. Reference Short Circuit Current
versus Temperature
200
VCC = 12 V
RL ≤ 0.1 Ω
160
120
80
40
–55
–25 0 25 50 75 100 125
TA, AMBIENT TEMPERATURE (°C)
Figure 12. Reference Line and Load
Regulation versus Temperature
3.0
2.0
1.0
Line Regulation
0 VCC = 12 V to 18 V
Iref = 0 mA
–1.0
–2.0
Load Regulation
–3.0 VCC = 12 V
Iref = 1.0 mA to 20 mA
–4.0
–5.0
–55
–25 0 25 50 75
TA, AMBIENT TEMPERATURE (°C)
100
125
Figure 13. Reference Voltage Change
versus Source Current
0
TA = –55°C
–5.0
–10 TA = 25°C
–15
TA = 125°C
–20
–25
–30
0
VCC = 12 V
30 60 90 120 150
Iref, REFERENCE SOURCE CURRENT (mA)
180
Figure 14. Thermal Resistance and Maximum
Power Dissipation versus P.C.B. Copper Length
100 5.0
Printed circuit board heatsink example
ÉÉÉÉÉÉÉÉÉÉ80
L
2.0 oz
Copper
4.0
60
RθJA
L 3.0 mm
Graphs represent symmetrical layout
3.0
40
20 PD(max) for TA = 70°C
2.0
1.0
00
0 10 20 30 40 50
L, LENGTH OF COPPER (mm)
6 MOTOROLA ANALOG IC DEVICE DATA
6 Page 
MC44602
Design Considerations
Do not attempt to construct the converter on
wire–wrap or plug–in prototype boards. High frequency
circuit layout techniques are imperative to prevent
pulse–width jitter. This is usually caused by excessive noise
pick–up imposed on the Current Sense or Voltage Feedback
inputs. Noise immunity can be improved by lowering circuit
impedances at these points. The printed circuit layout should
contain a ground plane with low–current signal, and high
current switch and output grounds returning on separate
paths back to the input filter capacitor. Ceramic bypass
capacitors (0.1 µF) connected directly to VCC, VC, and
Vref may be required depending upon circuit layout. This
provides a low impedance path for filtering the high frequency
noise. All high current loops should be kept as short as
possible using heavy copper runs to minimize radiated EMI.
The Error Amp compensation circuitry and the converter
output voltage divider should be located close to the IC and
as far as possible from the power switch and other noise
generating components.
PROTECTION MODES
The MC44602 operates as a conventional fixed frequency
current mode controller when the power supply output load is
less than the design limit. For enhanced system reliability, this
device has the unique ability of changing operating modes if
the power supply output is overloaded or shorted.
Overload Protection
Power supply overload protection is provided by the
Foldback Amplifier. As the output load gradually increases,
the Error Amplifier senses that the voltage at Pin 3 is less than
the 2.5 V threshold. This causes the voltage at Pin 1 to rise,
increasing the Current Sense Comparator threshold in order
to maintain output regulation. As the load further increases,
the inverting input of the Current Sense Comparator reaches
the internal 1.0 V clamp level, limiting the switch current to the
calculated Ipk(max). At this point any further increase in load
will cause the power supply output to fall out of regulation. As
the voltage at Pin 3 falls below 2.5 V, current will flow out of
the Foldback Amplifier input, and the internal clamp level will
be proportionally reduced (Figures 9, 10). The increase in
current flowing out of the Foldback Amplifier input in
conjunction with the reduced clamp level, causes the power
supply output voltage to fall at a faster rate than the voltage at
Pin 3. This results in the output foldback characteristic shown
in Figure 31. The shape of the current limit “knee” can be
modified by the value of resistor R1 in the feedback divider.
Lower values of R1 will reduce the Ipk(max) clamp level at a
faster rate.
Improper operation of the Foldback Amp can be
encountered when the Error Amp compensation capacitor Cf
exceeds 2.0 nF. The problem appears at Startup when the
output voltage of the power supply is below nominal, causing
the Error Amp output to rise quickly. The rapid change in
output voltage will be coupled through Cf to the Inverting Input
(Pin 3), keeping it at its 2.5 V threshold as the 1.0 mA Error
Amp current source charges Cf. This has the effect of
disabling the Foldback Amp by preventing Pin 3 and the
clamp level at the inverting input of the Current Sense
Comparator, from rising in proportion to the power supply
output voltage. By adding resistor RFB in series with Cf, the
voltage at Pin 3 can be held to 1.0 V, corresponding to a
Current Sense clamp level of 0.08 V (Figure 10), while
allowing the Error Amp output to reach its high state VOH of
7.0 V. The required resistor to keep Pin 3 below 1.0 V during
initial Startup is:
RFB Rf
RFB + Rf
≥6
R1 R2
R1 + R2
Figure 31. Output Foldback Characteristic
Vout
VO Nominal
lpk(max)
VCC UVLO
Threshold
New Startup
Low Value R1
Sequence Initiated
High Value R1
Nominal Load
Range
Overload Iout
Short Circuit Protection
Short circuit protection for the power supply is provided by
the Valid Load Comparator, Fault Latch, and Demag
Comparator. Figure 32 shows the logic truth table of the
functional blocks. When operating the power supply with
nominal output loading, the Fault Latch is “Set” by the NOR
gate driver during the Power Transistor “On” time and “Reset”
by the Fault Comparator during the “Off” time. When a severe
overload or short circuit occurs on any output, the voltage
during the “Off” time (flyback voltage) at the Load Detect
Input, is unable to reach the 2.5 V threshold of the Valid Load
Comparator. This causes the Fault Latch to remain in the
“Set” state with output Q “Low”. During the “Off” time the
Demag Comparator output will also be “Low”. This causes
the NOR gate to internally hold the Sync Input “High”,
inhibiting the next fixed frequency Oscillator cycle and
switching of the Power Transistor. As the load dissipates the
stored transformer energy, the voltage at the Load Detect
Input will fall. When this voltage reaches 85 mV, the Demag
Comparator output goes “High”, allowing the Sync Input to go
“Low”, and the Power Transistor to turn “On”.
Note that as long as there is an output short, the switching
frequency will shift to a much lower frequency than that set by
RT/CT. The frequency shift has the effect of lowering the duty
cycle, resulting in a significant reduction in Power Transistor
and Output Rectifier heating when compared to conventional
current mode controllers. The extended “On” time is the result
of CT charging from 0 V to 2.8 V instead of 1.2 V to 2.8 V. The
extended “Off” time is the result of the output short time
constant. The time constant consists of the output filter
capacitance, and the equivalent series resistance (ESR) of
the capacitor plus the associated wire resistance.
12 MOTOROLA ANALOG IC DEVICE DATA
12 Page | ||
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