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PDF MX10C805x Data sheet ( Hoja de datos )
| Número de pieza | MX10C805x | |
| Descripción | SINGLE-CHIP 8-BIT MICROCONTROLLER | |
| Fabricantes | MXIC | |
| Logotipo |  |
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ADVANCED INFORMATION
MX10C805X
SINGLE-CHIP 8-BIT MICROCONTROLLER
FEATURE
• High performance CMOS ROM CPU
• Operation Voltage 5V
• Up to 40MHz operation (3.5MHz to 40MHz)
• Three 16-bit timer/counters
• 256 Bytes of on-chip data RAM
• 4/8/16/32/64 Kbytes on-chip Program memory
• 32 Programmable I/O lines
• On-chip Watch-Dog-Timer (WDT)
• 6 interrupt Sources
GENERAL DESCRIPTION
• ROM Code protection
• Two priority levels
• Power saving Idle and power down modes
• 64 K external program memory space
• 64 K external data memory space
• Available in PLCC, PQFP, and PDIP package
• Four 8-bit I/O ports
• Full-duplex enhanced UART compatible with the stan-
dard 80C51 and the 80C52
• Extended Temperature Range (-40°C to +85° C)
The single-chip 8-bit microcontroller is manufactured in
MXIC's advanced CMOS process. This device uses the
same powerful instruction set, has the same architec-
ture, and is pin-to-pin compatible with the existing 80C51.
The added features make it an even more powerful
microcontroller for applications that require clock out-
put, and up/down counting capabilities such as motor
control. It also has a more versatile serial channel that
facilitates multi-processor communications.
PIN CONFIGURATIONS
44 PLCC
P1.5
P1.6
P1.7
RST
P3.0
N.C.
P3.1
P3.2
P3.3
P3.4
P3.5
6
7
12
17
18
1 44
MX10C805X
23
40
39 P0.4
P0.5
P0.6
P0.7
EA
34 N.C.
ALE
PSEN
P2.7
P2.6
29 P2.5
28
44 PQFP
40 PDIP
(T2) P1.0
(T2EX) P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
RESET
(RXD) P3.0
(TXD)P3.1
(INT0) P3.2
(INT1) P3.3
(T0) P3.4
(T1) P3.5
(WR) P3.6
(RD) P3.7
XTAL2
XTAL1
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40 VCC
39 P0.0 (AD0)
38 P0.1 (AD1)
37 P0.2 (AD2)
36 P0.3 (AD3)
35 P0.4 (AD4)
34 P0.5 (AD5)
33 P0.6 (AD6)
32 P0.7 (AD7)
31 EA
30 ALE
29 PSEN
28 P2.7 (A15)
27 P2.6 (A14)
26 P2.5 (A13)
25 P2.4 (A12)
24 P2.3 (A11)
23 P2.2 (A10)
22 P2.1 (A9)
21 P2.0 (A8)
P1.5
P1.6
P1.7
RST
P3.0
N.C.
P3.1
P3.2
P3.3
P3.4
P3.5
44 34
1 33
MX10C805X
11 23
12 22
P0.4
P0.5
P0.6
P0.7
EA
N.C.
ALE
PSEN
P2.7
P2.6
P2.5
P/N:PM0591
REV. 0.3, APR. 09, 1999
1
1 page  
MX10C805X
IDLE MODE
The user's software can invoke the Idle Mode. When
the microcontroller is in this mode, power consumption
is reduced. The Special Function Registers and the
onboard RAM retain their values during Idle, but the pro-
cessor stops executing instructions. Idle Mode will be
exited if the chip is reset or if an enabled interrupt oc-
curs.
ABSOLUTE MAXIMUM RATING*
Ambient Temperature Under Bias
Storage Temperature
Voltage on Any Other Pin to VSS
IOL Per I/O Pin
Power Dissipation
-40°C to +85°C
-65°C to +150°C
-0.5V to +6.5V
15mA
1.5W
(Based on PACKAGE heat transfer limitations, not de-
vice consumption)
Table 2. Status of the External Pins during Idle and Power Down
Mode
Idle
Idle
Power Down
Power Down
Program Memory
Internal
External
Internal
External
ALE
1
1
0
0
PSEN
1
1
0
0
PORT0
Data
Float
Data
Float
PORT1
Data
Data
Data
Data
PORT2
Data
Address
Data
Data
PORT3
Data
Data
Data
Data
POWER DOWN MODE
To save even more power, a Power Down mode can be
invoked by software. If this mode, the oscillator is stopped
and the instruction that invoked Power Down is the last
instruction executed. The on-chip RAM and Special
Function Registers retain their values until the Power
Down mode is terminated.
On the MX10C805X either a hardware reset or an ex-
ternal interrupt can cause an exit from Power Down. Re-
set redefines all the SFRs but does not change the on-
chip RAM. An external interrupt allows both the SFRs
and on-chip RAM to retain their values.
To properly terminate Power Down, the reset or exter-
nal interrupt should not be executed before VCC is re-
stored to its normal operating level, and must be held
active long enough for the oscillator to restart and stabi-
lize (normally less than 10 ms).
With an external interrupt, INT0 and INT1 must be en-
abled and configured as level-sensitive. Holding the pin
low restarts the oscillator but bringing the pin back high
completes the exit. Once the interrupt is serviced, the
next instruction to be executed after RETI will be the
one following the instruction that put the device into Power
Down.
OPERATING CONDITIONS
Symbol
TA
VCC
fOSC
Description
Ambient Temperature Under Bias
Commerical
Industrial
Oscillator Frequency
Min Max Units
0 +70 °C
-40 +85 °C
4.5 5.5 V
3.5 40 MHz
P/N:PM0591
REV. 0.3, APR. 09, 1999
5
5 Page 
MX10C805X
EXTERNAL PROGRAM MEMORY READ CYCLE
ALE
PSEN
PORT 0
PORT 2
TLHLL
TAVLL
TLLPL
TPLIP
TLHIV
TPLIV
TPLAZ
TLLAX
A0 - A7
TAVIV
TPXIZ
TPXIX
INSTR IN
A8 - A15
A0 - A7
A8 - A15
EXTERNAL DATA MEMORY READ CYCLE
ALE
PSEN
RD
PORT 0
PORT 2
TLHLL
TWHLH
TLLDL
TLLWL
TRLRH
TAVLL
TLLAX
A0-A7 FROM RI OR DPL
TAVWL
TAVDV
TRLDV
TRLIZ
TRHDZ
TRHDX
DATA IN
A0-A7 FROM
PCL
INSTR. IN
P2.0-P2.7 OR A8-A15 FROM DPH
A8-A15 FROM PCH
P/N:PM0591
REV. 0.3, APR. 09, 1999
11
11 Page | ||
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| PDF Descargar | [ Datasheet MX10C805x.PDF ] | |
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