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PDF SI3016 Data sheet ( Hoja de datos )

Número de pieza SI3016
Descripción 3.3 V ENHANCED GLOBAL DIRECT ACCESS ARRANGEMENT
Fabricantes Silicon Laboratories 
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Si3016
3.3 V ENHANCED GLOBAL DIRECT ACCESS ARRANGEMENT
Features
Complete DAA includes the following:
„ Line voltage monitor
„ 84 dB dynamic range TX/RX
„ Loop current monitor
„ Integrated analog front end (AFE)
„ 3.2 dBm transmit/receive Levels and 2- to 4-wire hybrid
„ Parallel handset detection
„ Integrated ring detector
„ 7 µA on-hook line monitor
„ Caller ID support
current
„ Pulse dialing support
„ Overload protection
„ Billing tone detection
„ Programmable line interface „ 3.3 V or 5 V power supply
z ac termination
„ Direct interface to DSPs
z dc termination
z Ring detect threshold
z Ringer impedance
„ Up to 5000 V isolation
„ Proprietary ISOcap™ technology
„ Polarity reversal detection
Applications
„ V.90 modems
„ Set-top boxes
„ Voice mail systems „ Fax machines
„ Internet appliances
„ VOIP systems
Ordering Information
See page 45.
Pin Assignments
Si3016
QE2
DCT
IGND
C1B
RNG1
RNG2
QB
QE
1
2
3
4
5
6
7
8
16 FILT2
15 FILT
14 RX
13 REXT
12 REXT2
11 REF
10 VREG2
9 VREG
Description
The Si3016 is an integrated direct access arrangement (DAA) line-side
device with a programmable line interface to meet global telephone line
interface requirements. Available in a 16-pin small outline package, it
eliminates the need for an analog front end (AFE), an isolation
transformer, relays, opto-isolators, and a 2- to 4-wire hybrid. The Si3016
dramatically reduces the number of discrete components and cost
required to achieve compliance with global regulatory requirements. The
Si3016 interfaces directly to a Silicon Laboratories integrated DAA
system-side interface.
U.S. Patent #5,870,046
U.S. Patent #6,061,009
Other Patents Pending
Functional Block Diagram
Silicon Laboratories
Integrated DAA
Interface
Si3016
Isolation
Interface
Hybrid
and DC
Termination
Ring Detect
Off-Hook
RX
FILT
FILT2
REF
DCT
VREG
VREG2
REXT
REXT2
RNG1
RNG2
QB
QE
QE2
Rev. 0.44 5/02
Copyright © 2002 by Silicon Laboratories
Si3016-DS044
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.

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SI3016 pdf
Si3016
Table 2. Loop Characteristics
(TA = 0 to 70 °C for K-Grade and –40 to 85 °C for B-Grade, See Figure 1)
Parameter
DC Termination Voltage
DC Termination Voltage
DC Termination Voltage
DC Termination Voltage
DC Termination Voltage
DC Termination Voltage
DC Termination Voltage
DC Termination Voltage
DC Termination Voltage
On Hook Leakage Current1
Operating Loop Current
Operating Loop Current
DC Ring Current1
Ring Detect Voltage2
Ring Detect Voltage2
Ring Frequency
Ringer Equivalence Number 3
Symbol
Test Condition
Min Typ Max Unit
VTR IL = 20 mA, ACT = 1 — — 7.5 V
DCT = 11 (CTR21)
VTR IL = 42 mA, ACT = 1 —
DCT = 11 (CTR21)
— 14.5
V
VTR IL = 50 mA, ACT = 1 —
40
V
DCT = 11 (CTR21)
VTR IL = 60 mA, ACT = 1 40 — —
DCT = 11 (CTR21)
V
VTR IL = 20 mA, ACT = 0 — — 6.0 V
DCT = 01 (Japan)
VTR IL = 100 mA, ACT = 0
DCT = 01 (Japan)
9
——
V
VTR IL = 20 mA, ACT = 0 — — 7.5 V
DCT = 10 (FCC)
VTR IL = 100 mA, ACT = 0
DCT = 10 (FCC)
9
——
V
VTR IL = 15 mA, ACT = 0 — — 5.2 V
DCT = 00 (Low Voltage)
ILK VTR = –48 V — — 7 µA
ILP
FCC / Japan Modes
13
120 mA
ILP
CTR21 Mode
13 — 60 mA
dc flowing through ring —
7
µA
detection circuitry
VRD
VRD
FR
REN
RT = 0
RT = 1
11 — 22 VRMS
17 — 33 VRMS
15 — 68 Hz
— — 0.2
Notes:
1. R25 and R26 installed.
2. The ring signal is guaranteed to not be detected below the minimum. The ring signal is guaranteed to be detected above
the maximum.
3. RZ = 0. See "Ringer Impedance" on page 18.
TIP
+
Si3016 VTR
600
10 µF
IL
RING
Figure 1. Test Circuit for Loop Characteristics
Rev. 0.44
5

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SI3016 arduino
Si3016
Analog Output
Figure 7 illustrates an optional application circuit to support the analog output capability of the DAA system-side
module for call progress monitoring purposes. The ARM bits in Register 6 allow the receive path to be attenuated
by 0, –6, or –12 dB. The ATM bits, which are also in Register 6, allow the transmit path to be attenuated by –20,
–26, or –32 dB. Both the transmit and receive paths can also be independently muted.
AOUT
C2 R3
C1 C6
+5 V
36
+5
2–
4
R1 C3
C4
+
C5
R2
Speaker
Figure 7. Optional Connection to AOUT for a Call Progress Speaker
Table 8. Component Values—Optional Connection to AOUT
Symbol
C1
C2, C3, C5
C4
C6
R1
R2
R3
U1
Value
2200 pF, 16 V, ±20%
0.1 µF, 16 V, ±20%
100 µF, 16 V, Elec. ±20%
820 pF, 16 V, ±20%
10 k, 1/10 W, ±5%
10 , 1/10 W, ±5%
47 k, 1/10 W, ±5%
LM386
Rev. 0.44
11

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