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PDF MC74HC161A Data sheet ( Hoja de datos )
| Número de pieza | MC74HC161A | |
| Descripción | (MC74HC161A / MC74HC163A) Presettable Counters | |
| Fabricantes | Motorola Semiconductors | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de MC74HC161A (archivo pdf) en la parte inferior de esta página. Total 12 Páginas | ||
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Presettable Counters
High–Performance Silicon–Gate CMOS
The MC54/74HCT161A and HCT163A are identical in pinout to the LS161A
and LS163A. These devices may be used as level converters for interfacing
TTL or NMOS outputs to high speed CMOS inputs.
The HCT161A and HCT163A are programmable 4–bit binary counters with
asynchronous and synchronous reset, respectively.
• Output Drive Capability: 10 LSTTL Loads
• TTL, NMOS Compatible Input Levels
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 4.5 to 5.5 V
• Low Input Current: 1 µA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 200 FETs or 50 Equivalent Gates
LOGIC DIAGRAM
Preset
Data
Inputs
P0 3
P1 4
P2 5
P3 6
Clock 2
Count
Enables
Reset
Load
Enable P
Enable T
1
9
7
10
14 Q0
13 Q1 BCD or Binary
12 Q2 Outputs
11 Q3
15 Ripple
Carry Out
Pin 16 = VCC
Pin 8 = GND
MC54/74HCT161A
MC54/74HCT163A
16
1
J SUFFIX
CERAMIC PACKAGE
CASE 620–10
16
1
N SUFFIX
PLASTIC PACKAGE
CASE 648–08
16
1
D SUFFIX
SOIC PACKAGE
CASE 751B–05
ORDERING INFORMATION
MC54HCXXXAJ
MC74HCXXXAN
MC74HCXXXAD
Ceramic
Plastic
SOIC
Device
HCT161A
HCT163A
Count Mode
Binary
Binary
Reset Mode
Asynchronous
Synchronous
Pinout: 16–Lead Package (Top View)
Enable
VCC RCO* Q0 Q1 Q2 Q3 T Load
16 15 14 13 12 11 10 9
FUNCTION TABLE
Clock
Reset*
Inputs
Load Enable P Enable T
Output
Q
L X X X Reset
H L X X Load Preset Data
H H H H Count
H H L X No Count
HH X
L No Count
H = High Level; L = Low Level; X = Don’t Care
* = HCT163A only. HCT161A is an “Asynchronous–Reset” device.
12
Reset Clock
345678
P0 P1 P2 P3 Enable GND
P
* RCO = Ripple Carry Out
10/95
© Motorola, Inc. 1995
1 REV 2
1 page  
MC54/74HCT161A MC54/74HCT163A
tr tf
Clock
Any
Output
90%
1.3V
10%
tw
tPLH
1/fMAX
90%
1.3V
10%
tTLH
tPHL
tTHL
Figure 1.
SWITCHING WAVEFORMS
3.0V
Reset
GND
tPHL
Any
Output
Clock
tw
1.3V
1.3V
trec
1.3V
Figure 2.
3.0V
GND
3.0V
GND
Enable T
Ripple
Carry Out
tr
90%
1.3V
10%
tPLH
90%
1.3V
10%
tTLH
Figure 3.
tf
3.0V
GND
tPHL
tTHL
Reset
Clock
tsu
1.3V
th
1.3V
Figure 4. HCT163A Only
3.0V
GND
3.0V
GND
Inputs P0,
P1, P2, P3
Load
Clock
1.3V
tsu
1.3V
tsu
th
th
1.3V
trec
Figure 5.
3.0V
GND
Enable T
or
3.0V Enable P
GND
3.0V Clock
GND
Valid
1.3V
tsu th
1.3V
Figure 6.
3.0V
GND
3.0V
GND
DEVICE
UNDER
TEST
TEST
POINT
OUTPUT
CL*
*Includes all probe and jig capacitance
Figure 7. Test Circuit
High–Speed CMOS Logic Data
DL129 — Rev 6
5
MOTOROLA
5 Page 
MC54/74HCT161A MC54/74HCT163A
–A
–
16
1
OUTLINE DIMENSIONS
J SUFFIX
CERAMIC PACKAGE
CASE 620–10
9 ISSUE V
–B
–
8
CL
–T
SEAT–ING
PLANE
F
NK
E
G
D 16 PL
0.25 (0.010) M T A S
M
J 16 PL
0.25 (0.010) M T B S
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIM F MAY NARROW TO 0.76 (0.030) WHERE
THE LEAD ENTERS THE CERAMIC BODY.
INCHES
MILLIMETERS
DIM MIN MAX MIN MAX
A 0.750 0.785 19.05 19.93
B 0.240 0.295 6.10 7.49
C — 0.200 — 5.08
D 0.015 0.020 0.39 0.50
E 0.050 BSC 1.27 BSC
F 0.055 0.065 1.40 1.65
G 0.100 BSC
2.54 BSC
J 0.008 0.015 0.21 0.38
K 0.125 0.170 3.18 4.31
L 0.300 BSC 7.62 BSC
M 0° 15° 0° 15°
N 0.020 0.040 0.51 1.01
–A
–
16
1
H
G
9
B
8
N SUFFIX
PLASTIC PACKAGE
CASE 648–08
ISSUE R
FC
S
–T
–
SEATING
PLANE
K
J
D 16 PL
0.25 (0.010) M T A M
L
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
INCHES
MILLIMETERS
DIM MIN MAX MIN MAX
A 0.740 0.770 18.80 19.55
B 0.250 0.270 6.35 6.85
C 0.145 0.175 3.69 4.44
D 0.015 0.021 0.39 0.53
F 0.040 0.070 1.02 1.77
G
0.100 BSC
2.54 BSC
H
0.050 BSC
1.27 BSC
J 0.008 0.015 0.21 0.38
K 0.110 0.130 2.80 3.30
L 0.295 0.305 7.50 7.74
M
0° 10°
0° 10°
S 0.020 0.040 0.51 1.01
–A
–
16
1
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751B–05
ISSUE J
9
–B
–
8
P 8 PL
0.25 (0.010) M
BM
–T
SEAT–ING
PLANE
G
K
C
D 16 PL
0.25 (0.010) M T B S A S
M
R X 45°
F
J
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
MILLIMETERS
INCHES
DIM MIN MAX MIN MAX
A 9.80 10.00 0.386 0.393
B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.054 0.068
D 0.35 0.49 0.014 0.019
F 0.40 1.25 0.016 0.049
G
1.27 BSC
0.050 BSC
J 0.19 0.25 0.008 0.009
K 0.10 0.25 0.004 0.009
M 0° 7° 0° 7°
P 5.80 6.20 0.229 0.244
R 0.25 0.50 0.010 0.019
High–Speed CMOS Logic Data
DL129 — Rev 6
11
MOTOROLA
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet MC74HC161A.PDF ] | |
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