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PDF MB90438L Data sheet ( Hoja de datos )

Número de pieza MB90438L
Descripción (MB90435 - MB90540) 16-bit Proprietary Microcontroller
Fabricantes Fujitsu Media Devices 
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FUJITSU SEMICONDUCTOR
DATA SHEET
DS07-13727-1E
16-bit Proprietary Microcontroller
CMOS
F2MC-16LX MB90435 Series
MB90437L (S) /438L (S) /F438L (S)
MB90439 (S) /F439 (S) /V540G
s DESCRIPTION
The MB90435 series with FLASH ROM is specially designed for industrial applications.
The instruction set by F2MC-16LX CPU core inherits an AT architecture of the F2MC* family with additional
instruction sets for high-level languages, extended addressing mode, enhanced multiplication/division instruc-
tions, and enhanced bit manipulation instructions.The micro controller has a 32-bit accumulator for processing
long word data.
The MB90435 series has peripheral resources of 8/10-bit A/D converters, UART (SCI) , extended I/O serial
interfaces, 8/16-bit timer, I/O timer (input capture (ICU) , output compare (OCU) ) .
* : F2MC stands for FUJITSU Flexible Microcontroller.
s FEATURES
• Clock
Embedded PLL clock multiplication circuit
Operating clock (PLL clock) can be selected from : divided-by-2 of oscillation or one to four times the oscillation
Minimum instruction execution time : 62.5 ns (operation at oscillation of 4 MHz, four times the oscillation clock,
VCC of 5.0 V)
Subsystem Clock : 32 kHz
s PACKAGES
(Continued)
100-pin Plastic QFP
100-pin Plastic LQFP
(FPT-100P-M06)
(FPT-100P-M05)

1 page




MB90438L pdf
MB90435 Series
(Continued)
Features
MB90F438L (S) /F439 (S)
MB90437L (S) *1
/438L (S) /439 (S)
MB90V540G
16-bit Reload Timer
(2 channels)
Operation clock frequency : fsys/21, fsys/23, fsys/25 (fsys = System clock frequency)
Supports External Event Count function
Signals an interrupt when overflow
16-bit I/O Timer
Supports Timer Clear when a match with Output Compare (Channel 0)
Operation clock freq. : fsys/22, fsys/24, fsys/26, fsys/28 (fsys = System clock freq.)
16-bit Output Compare
(4 channels)
Signals an interrupt when a match with 16-bit I/O Timer
Four 16-bit compare registers
A pair of compare registers can be used to generate an output signal
16-bit Input Capture
(8 channels)
Rising edge, falling edge or rising & falling edge sensitive
Four 16-bit Capture registers
Signals an interrupt upon external event
8/16-bit
Programmable
Pulse Generator
(4 channels)
Supports 8-bit and 16-bit operation modes
Eight 8-bit reload counters
Eight 8-bit reload registers for L pulse width
Eight 8-bit reload registers for H pulse width
A pair of 8-bit reload counters can be configured as one 16-bit reload counter or as 8-bit
prescaler plus 8-bit reload counter
4 output pins
Operation clock freq. : fsys, fsys/21, fsys/22, fsys/23, fsys/24 or 128 µs@fosc = 4 MHz
(fsys = System clock frequency, fosc = Oscillation clock frequency)
32 kHz Sub-clock
Sub-clock for low power operation
External Interrupt
(8 channels)
Can be programmed edge sensitive or level sensitive
External bus
interface
External access using the selectable 8-bit or 16-bit bus is enabled
(external bus mode.)
I/O Ports
Virtually all external pins can be used as general purpose I/O
All push-pull outputs and schmitt trigger inputs
Bit-wise programmable as input/output or peripheral signal
Flash Memory
Supports automatic programming, Embeded Algorithm TM*4
Write/Erase/Erase-Suspend/Erase-Resume commands
A flag indicating completion of the algorithm
Number of erase cycles : 10,000 times
Data retention time : 10 years
Boot block configuration
Erase can be performed on each block
Block protection by externally programmed voltage
*1 : Under development
*2 : If the one clock system is used, equip X0A and X1A with clocks from the tool side.
*3 : It is setting of DIP switch S2 when Emulator pod (MB2145-507) is used.Please refer to the MB2145-507 hardware
manual (2.7 Emulator-specific Power Pin) about details.
*4 : Embedded Algorithm is a trade mark of Advanced Micro Devices Inc.
*5 : OPERATING VOLTAGE RANGE
Products
Operation guarantee range
MB90F439 (S) /439 (S) /V540G
4.5 V to 5.5 V
MB90F438L (S) /437L (S) /438L (S)
3.5 V to 5.5 V
5

5 Page





MB90438L arduino
MB90435 Series
Pin No.
LQFP*2 QFP*1
Pin name
46 48
P57
TOT0
51 to 56 53 to 58
P70 to P75
IN0 to IN5
P76 , P77
57 , 58 59 , 60 OUT2 , OUT3
IN6 , IN7
59 , 62 61 to 64
P80 to P83
PPG0 to
PPG3
63 , 64
P84 , P85
65 , 66
OUT0 , OUT1
65 67
P86
TIN1
66 68
P87
TOT1
P90 to P93
67 to 70 69 to 72
INT0 to INT3
71 73
P94
Circuit
type
D
D
D
D
D
D
D
D
D
Function
General I/O port. This function is enabled when the 16-bit
reload timers 0 disables the output.
Output pin for the 16-bit reload timers 0. This function is
enabled when the 16-bit reload timers 0 enables the output.
General I/O ports. This function is always enabled.
Trigger input pins for input captures ICU0 to ICU5. Set the
corresponding Port Direction Register to input if this
function is used.
General I/O ports. This function is enabled when the OCU
disables the waveform output.
Event output pins for output compares OCU2 and OCU3. This
function is enabled when the OCU enables the waveform
output.
Trigger input pins for input captures ICU6 and ICU7. Set the
corresponding Port Direction Register to input and disable the
OCU waveform output if this function is used.
General I/O ports. This function is enabled when 8/16-bit PPG
disables the waveform output.
Output pins for 8/16-bit PPGs. This function is enabled when
8/16-bit PPG enables the waveform output.
General I/O ports. This function is enabled when the OCU
disables the waveform output.
Waveform output pins for output compares OCU0 and OCU1.
This function is enabled when the OCU enables the waveform
output.
General I/O port. This function is always enabled.
Input pin for the 16-bit reload timers 1. Set the
corresponding Port Direction Register to input if this function is
used.
General I/O port. This function is enabled when the 16-bit
reload timers 0 disables the output.
Output pin for the 16-bit reload timers 1.This function is
enabled when the 16-bit reload timers 1 enables the output.
General I/O port. This function is always enabled.
External interrupt request input pins for INT0 to INT3. Set the
corresponding Port Direction Register to input if this function is
used.
General I/O port.
(Continued)
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