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I.MX31L Schematic ( PDF Datasheet ) - Freescale Semiconductor

Teilenummer I.MX31L
Beschreibung Multimedia Applications Processors
Hersteller Freescale Semiconductor
Logo Freescale Semiconductor Logo 




Gesamt 18 Seiten
I.MX31L Datasheet, Funktion
Freescale Semiconductor
Product Brief
Document Number: MC1128MX31PB
Rev. 0.6, 06/2005
i.MX31 and i.MX31L
Multimedia Applications Processors
1 Introduction
The i.MX31 and i.MX31L multimedia applications
processors represent Freescale Semiconductor’s latest
achievement in multimedia integrated applications
processors that are part of a growing family of
multimedia-focused products offering high performance
processing optimized for lowest power consumption.
The i.MX31 and i.MX31L processors feature Freescale's
advanced and power-efficient implementation of the
ARM1136JF-S™ core, which operates at speeds starting
at 532 MHz.
Unless otherwise specified, the material in this product
brief is applicable to both the i.MX31 and i.MX31L
processors. Features include the following:
Smart Speed Technology—The heart of the
i.MX31 and i.MX31L processors is a level of
power management throughout the ICs that allow
the rich suite of multimedia features and
peripherals to achieve minimum system power
consumption in both active and various
low-power modes. Smart Speed Technology
Contents
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
© Freescale Semiconductor, Inc., 2005. All rights reserved.






I.MX31L Datasheet, Funktion
Features
2.4.1 Video Applications
The i.MX31 and i.MX31L processors are optimized to support a variety of video applications. Figure 2 on
page 6 describes the video processing chain and its implementation.
Image Sensor
Display
Performed by:
Camera (Image Signal Processing)
(or ARM11 SW)
Image Processing Unit in i.MX31
MPEG4 Encoder in i.MX31
ARM11 SW
Image Conversion:
• Resizing (resolution adjustment)
• Rotation & Inversion
• Pixel format conversion
(color space, packing, …)
• Combining with a graphics overlay
Bayer
Format
Conversion
YUV
Quality
Enhancement
Image
Conversion
Image
Processing
Unit
(IPU)
Viewfinder Window
Compression
MPEG-4
Encoder
Memory
Combining
with Audio
Communication
Network
Figure 2. Video Processing Chain
RGB
Image
Conversion
Post Filtering
YUV
De-compression
Separation
from Audio
The video implementation in the i.MX31 and i.MX31L processors is a result of a smart trade-off between
performance and flexibility. The following points describe some of the video performance features:
Image processing—The processing required for a camera preview function is performed fully in
hardware, allowing the CPU to be powered-down in this stage.
Encoding—MPEG-4 SP and the H.263 baseline formats are fully hardware accelerated,
supporting resolutions up to VGA at 30 fps. As a result, a high degree of power efficiency is
achieved, and the CPU is freed to perform other tasks. Encoding for other video standards are
achieved using software implementation.
Decoding—Based on a mixture of software and hardware, this implementation provides the
greatest flexibility to support a variety of algorithms and future extensions. A sufficient software
optimization level may be achieved using the advanced ARM11 instruction set and multi-level
cache system. For MPEG4, the post-filtering (de-blocking and de-ringing) is accelerated by IPU
hardware, resulting in a 75% load reduction on the ARM11 core. For H.264 baseline format—the
most processing-intensive format—the deblocking filter is also performed in hardware providing
a 30% acceleration improvement The powerful ARM11 processor (including its 2-level cache
system) provides the flexibility to decode at a high rate any currently relevant formats (up to HVGA
@ 30 fps), as well as possible future extensions.
i.MX31 and i.MX31L Multimedia Applications Processors Product Brief, Rev. 0.6
6 Freescale Semiconductor

6 Page









I.MX31L pdf, datenblatt
Features
i.MX31/i.MX31L WB
MP3
SSI1
Port 1
i.MX31/i.MX31L NB
Voice Notes
SSI2
Port 2
Baseband
IC Voice
BB SAP
Port 3
Alert Tone
(EPx((EEPPotxxeoorttrteerrnrrtt4nna44aalll)))
(EPx((EEPPotxxeoorttrteerrnrrtt5nna55aalll)))
(EPx((EEPPotxxeoorttrteerrnrrtt6nna66aalll)))
(EPx((EEPPotxxeoorttrteerrnrrtt7nna77aalll)))
Power
Management
IC
Voice
Codec
BluetoothTM
IC Voice
Stereo
DAC
ADC/DAC
Audio
Blue
tooth
ADC/DAC
Voice
Option
Voice Call
Figure 8. Typical AUDMUX Application
2.9 Security Features
Not only do the i.MX31 and i.MX31L processors offer a wide assortment of security features, but these
features are robust and offer a high degree of protection for security. The i.MX31 and i.MX31L processors’
security architecture is based on efficient system partitioning between software and hardware
implementations.
The following security features are implemented:
• MMU (Memory Management Unit)
• Security Controller (SCC), including Secure RAM and Security Monitor
• Random Number Generator Accelerator (RNGA)
• Secure JTAG controller (with optional JTAG disabling)
• Universal Unique Identification
• Real Time Integrity Checker (RTIC), Including SHA-1 accelerator
• High Assurance Boot (HAB)
• Tamper Detection
These security features are intended to address the following concerns:
• Service carriers concerns of portable device cloning and theft of services
• OS and vendor SW authentication
• Secure mobile communications and transactions
• Secure video conference call
• Secure M-commerce
• Digital rights management (DRM)
• Defense against physical tampering
i.MX31 and i.MX31L Multimedia Applications Processors Product Brief, Rev. 0.6
12 Freescale Semiconductor

12 Page





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