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PDF MSM5117400B Data sheet ( Hoja de datos )

Número de pieza MSM5117400B
Descripción DRAM / FAST PAGE MODE TYPE
Fabricantes OKI electronic componets 
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No Preview Available ! MSM5117400B Hoja de datos, Descripción, Manual

¡¡SemicondSucetormiconductor
MSM5117400B
4,194,304-Word ¥ 4-Bit DYNAMIC RAM : FAST PAGE MODE TYPE
MSM5117400B
E2G0035-17-41
DESCRIPTION
The MSM5117400B is a 4,194,304-word ¥ 4-bit dynamic RAM fabricated in Oki's silicon-gate CMOS
technology. The MSM5117400B achieves high integration, high-speed operation, and low-power
consumption because Oki manufactures the device in a quadruple-layer polysilicon/double-layer
metal CMOS process. The MSM5117400B is available in a 26/24-pin plastic SOJ or 26/24-pin plastic
TSOP.
FEATURES
• 4,194,304-word ¥ 4-bit configuration
• Single 5 V power supply, ±10% tolerance
• Input : TTL compatible, low input capacitance
• Output : TTL compatible, 3-state
• Refresh : 2048 cycles/32 ms
• Fast page mode, read modify write capability
CAS before RAS refresh, hidden refresh, RAS-only refresh capability
• Multi-bit test mode capability
• Package options:
26/24-pin 300 mil plastic SOJ (SOJ26/24-P-300-1.27) (Product : MSM5117400B-xxSJ)
26/24-pin 300 mil plastic TSOP (TSOPII26/24-P-300-1.27-K) (Product : MSM5117400B-xxTS-K)
(TSOPII26/24-P-300-1.27-L) (Product : MSM5117400B-xxTS-L)
xx indicates speed rank.
PRODUCT FAMILY
Family
MSM5117400B-50
MSM5117400B-60
MSM5117400B-70
Access Time (Max.) Cycle Time
Power Dissipation
tRAC tAA tCAC tOEA
(Min.) Operating (Max.) Standby (Max.)
50 ns 25 ns 13 ns 13 ns 90 ns
660 mW
60 ns 30 ns 15 ns 15 ns 110 ns
605 mW
5.5 mW
70 ns 35 ns 20 ns 20 ns 130 ns
550 mW
16M
215

1 page




MSM5117400B pdf
¡ Semiconductor
MSM5117400B
DC Characteristics
(VCC = 5 V ±10%, Ta = 0°C to 70°C)
Parameter
Symbol
Condition
MSM5117400 MSM5117400 MSM5117400
B-50
B-60
B-70
Unit Note
Min. Max. Min. Max. Min. Max.
Output High Voltage
Output Low Voltage
Input Leakage Current
VOH IOH = –5.0 mA
VOL IOL = 4.2 mA
0 V £ VI £ 6.5 V;
ILI All other pins not
under test = 0 V
2.4 VCC
0 0.4
2.4 VCC
0 0.4
2.4 VCC
0 0.4
V
V
–10 10 –10 10 –10 10 mA
Output Leakage Current
Average Power
Supply Current
(Operating)
DQ disable
ILO 0 V £ VO £ 5.5 V
RAS, CAS cycling,
ICC1 tRC = Min.
–10 10
— 120
–10 10
— 110
–10 10 mA
— 100 mA 1, 2
Power Supply
Current (Standby)
Average Power
RAS, CAS = VIH
ICC2 RAS, CAS
VCC –0.2 V
RAS cycling,
—2
—1
—2
—1
—2
mA 1
—1
Supply Current
(RAS-only Refresh)
Power Supply
Current (Standby)
ICC3 CAS = VIH,
tRC = Min.
RAS = VIH,
ICC5 CAS = VIL,
DQ = enable
— 120 — 110 — 100 mA 1, 2
—5
—5
— 5 mA 1
Average Power
Supply Current
(CAS before RAS Refresh)
RAS cycling,
ICC6 CAS before RAS
— 120 — 110 — 100 mA 1, 2
Average Power
Supply Current
(Fast Page Mode)
RAS = VIL,
ICC7 CAS cycling,
tPC = Min.
— 110 — 100 — 90 mA 1, 3
Notes : 1. ICC Max. is specified as ICC for output open condition.
2. The address can be changed once or less while RAS = VIL.
3. The address can be changed once or less while CAS = VIH.
16M
219

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