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PDF STP80N05-09 Data sheet ( Hoja de datos )
| Número de pieza | STP80N05-09 | |
| Descripción | N - CHANNEL ENHANCEMENT MODE ULTRA HIGH DENSITY POWER MOS TRANSISTOR | |
| Fabricantes | ST Microelectronics | |
| Logotipo |  |
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STP80N05-09
N - CHANNEL ENHANCEMENT MODE
”ULTRA HIGH DENSITY” POWER MOS TRANSISTOR
TYPE
ST P8 0N05 -09
VDS S
50 V
RDS(o n)
< 0.009 Ω
ID
80 A
s ULTRA HIGH DENSITY TECHNOLOGY
s TYPICAL RDS(on) = 7 mΩ
s AVALANCHE RUGGED TECHNOLOGY
s LOW GATE CHARGE
s HIGH CURRENT CAPABILITY
s 175 oC OPERATING TEMPERATURE
APPLICATIONS
s SYNCROUNOUS RECTIFIERS
s HIGH CURRENT, HIGH SPEED SWITCHING
s DC-DC & DC-AC CONVERTER ABSOLUTE
MAXIMUM RATINGS
3
2
1
TO-220
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
S ym bol
P ar a mete r
VDS Drain-source Vo ltage (VGS = 0)
VDGR Drain- gate Vol tage (RGS = 20 kΩ)
VGS Gate-s ource Vol tage
ID Drain Current (conti nuous) at Tc = 25 oC
ID Drain Current (conti nuous) at Tc = 100 oC
IDM(•) Drain Current (pul sed)
Ptot Total Dis sipation at Tc = 25 oC
Derating Fac tor
dV/dt(1) Peak Diode Recov ery vo ltage slo pe
Tstg Storage Temperature
Tj Max. Operating Junction Temperature
(•) Pulse width limited by safe operating area
March 1997
Value
Unit
50 V
50 V
± 20
V
80 A
60 A
320 A
150 W
1 W/oC
5 V/ns
-65 to 175
oC
175 oC
(1) ISD ≤ 60 A, di/dt ≤ 200 A/ms, VDD ≤ V(BR)DSS, TJ ≤ TJMAX
1/9
1 page  
Capacitance Variations
STP80N05-09
Normalized Gate Threshold Voltage vs
Temperature
Normalized On Resistance vs Temperature
Turn-on Current Slope
Turn-off Drain-source Voltage Slope
Cross-over Time
5/9
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet STP80N05-09.PDF ] | |
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| STP80N05-09 | N - CHANNEL ENHANCEMENT MODE ULTRA HIGH DENSITY POWER MOS TRANSISTOR | ST Microelectronics |
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