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M3822x Schematic ( PDF Datasheet ) - Renesas

Teilenummer M3822x
Beschreibung SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Hersteller Renesas
Logo Renesas Logo 




Gesamt 30 Seiten
M3822x Datasheet, Funktion
To all our customers
Regarding the change of names mentioned in the document, such as Mitsubishi
Electric and Mitsubishi XX, to Renesas Technology Corp.
The semiconductor operations of Hitachi and Mitsubishi Electric were transferred to Renesas
Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog
and discrete devices, and memory chips other than DRAMs (flash memory, SRAMs etc.)
Accordingly, although Mitsubishi Electric, Mitsubishi Electric Corporation, Mitsubishi
Semiconductors, and other Mitsubishi brand names are mentioned in the document, these names
have in fact all been changed to Renesas Technology Corp. Thank you for your understanding.
Except for our corporate trademark, logo and corporate statement, no changes whatsoever have been
made to the contents of the document, and these changes do not constitute any alteration to the
contents of the document itself.
Note : Mitsubishi Electric will continue the business operations of high frequency & optical devices
and power devices.
Renesas Technology Corp.
Customer Support Dept.
April 1, 2003






M3822x Datasheet, Funktion
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Table 2 Pin description (2)
Pin
P40
Name
Input port P4
P41/φ
P42/INT0,
P43/INT1
P44/RXD,
P45/TXD,
P46/SCLK,
P47/SRDY
P50/INT2,
P51/INT3
I/O port P4
I/O port P5
P52/RTP0,
P53/RTP1
P54/CNTR0,
P55/CNTR1
P56/TOUT
P57/ADT
P60/AN0
P67/AN7
I/O port P6
P70/XCOUT,
P71/XCIN
I/O port P7
Function
1-bit Input port.
CMOS compatible input level.
7-bit I/O port.
CMOS compatible input level.
CMOS 3-state output structure.
I/O direction register allows each pin to be individually
programmed as either input or output.
Pull-up control is enabled.
8-bit I/O port.
CMOS compatible input level.
CMOS 3-state output structure.
I/O direction register allows each pin to be individually
programmed as either input or output.
Pull-up control is enabled.
Function except a port function
φ clock output pin
Interrupt input pins
Serial I/O function pins
Interrupt input pins
Real time port function pins
Timer X, Y function pins
8-bit I/O port.
CMOS compatible input level.
CMOS 3-state output structure.
I/O direction register allows each pin to be individually
programmed as either input or output.
Pull-up control is enabled.
2-bit I/O port.
CMOS compatible input level.
CMOS 3-state output structure.
I/O direction register allows each pin to be individually
programmed as either input or output.
Pull-up control is enabled.
Timer 2 output pins
A-D trigger input pins
A-D conversion input pins
Sub-clock generating circuit I/O pins.
(Connect a resonator. External clock
cannot be used.)
5

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M3822x pdf, datenblatt
MITSUBISHI MICROCOMPUTERS
3822 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
FUNCTIONAL DESCRIPTION
CENTRAL PROCESSING UNIT (CPU)
The 3822 group uses the standard 740 family instruction set. Re-
fer to the table of 740 family addressing modes and machine
instructions or the 740 Family Software Manual for details on the
instruction set.
Machine-resident 740 family instructions are as follows:
The FST and SLW instruction cannot be used.
The STP, WIT, MUL, and DIV instruction can be used.
[Accumulator (A)]
The accumulator is an 8-bit register. Data operations such as data
transfer, etc., are executed mainly through the accumulator.
[Index Register X (X)]
The index register X is an 8-bit register. In the index addressing
modes, the value of the OPERAND is added to the contents of
register X and specifies the real address.
[Index Register Y (Y)]
The index register Y is an 8-bit register. In partial instruction, the
value of the OPERAND is added to the contents of register Y and
specifies the real address.
[Stack Pointer (S)]
The stack pointer is an 8-bit register used during subroutine calls
and interrupts. This register indicates start address of stored area
(stack) for storing registers during subroutine calls and interrupts.
The low-order 8 bits of the stack address are determined by the
contents of the stack pointer. The high-order 8 bits of the stack ad-
dress are determined by the stack page selection bit. If the stack
page selection bit is 0, the high-order 8 bits becomes 0016. If
the stack page selection bit is 1, the high-order 8 bits becomes
0116.
The operations of pushing register contents onto the stack and
popping them from the stack are shown in Figure 10.
Store registers other than those described in Figure 10 with pro-
gram when the user needs them during interrupts or subroutine
calls.
[Program Counter (PC)]
The program counter is a 16-bit counter consisting of two 8-bit
registers PCH and PCL. It is used to indicate the address of the
next instruction to be executed.
b15
PCH
Fig.9 740 Family CPU register structure
b7 b0
A Accumulator
b7 b0
X Index register X
b7 b0
Y Index register Y
b7 b0
S Stack pointer
b7 b0
PCL Program counter
b7 b0
N V T B D I Z C Processor status register (PS)
Carry flag
Zero flag
Interrupt disable flag
Decimal mode flag
Break flag
Index X mode flag
Overflow flag
Negative flag
11

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