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ST24LW21 Schematic ( PDF Datasheet ) - ST Microelectronics

Teilenummer ST24LW21
Beschreibung 1 Kbit x8 Dual Mode Serial EEPROM for VESA PLUG & PLAY
Hersteller ST Microelectronics
Logo ST Microelectronics Logo 




Gesamt 22 Seiten
ST24LW21 Datasheet, Funktion
ST24LC21B, ST24LW21
ST24FC21, ST24FC21B, ST24FW21
1 Kbit (x8) Dual Mode Serial EEPROM
for VESA PLUG & PLAY
1 MILLION ERASE/WRITE CYCLES
40 YEARS DATA RETENTION
3.6V to 5.5V or 2.5V to 5.5V SINGLE SUPPLY
VOLTAGE
HARDWARE WRITE CONTROL (ST24LW21
and ST24FW21)
TTL SCHMITT-TRIGGER on VCLK INPUT
100k / 400k Hz COMPATIBILITY with the I2C
BUS BIT TRANSFER RANGE
TWO WIRE SERIAL INTERFACE I2C BUS
COMPATIBLE
I2C PAGE WRITE (up to 8 Bytes)
I2C BYTE, RANDOM and SEQUENTIAL READ
MODES
SELF TIMED PROGRAMMING CYCLE
AUTOMATIC ADDRESS INCREMENTING
ENHANCED ESD/LATCH UP
PERFORMANCES
ERROR RECOVERY MECHANISM
(ST24FC21 and ST24FW21) VESA 2
COMPATIBLE
DESCRIPTION
The ST24LC21B, ST24LW21, ST24FC21,
ST24FC21B and ST24FW21 are 1K bit electrically
erasable programmable memory (EEPROM), or-
ganized in 128x8 bits. In the text, products are
referred as ST24xy21, where "x" is either "L" for
VESA 1 or "F" for VESA 2 compatible memories
and where "y" indicates the Write Control pin con-
nection: "C" means WC on pin 7 and "W" means
WC on pin 3.
8
1
PSDIP8 (B)
0.25mm Frame
8
1
SO8 (M)
150mil Width
Figure 1. Logic Diagram
VCC
SCL
VCLK
WC
ST24xy21
SDA
Table 1. Signal Names
SDA
SCL
Serial Data Address Input/Output
Serial Clock (I2C mode)
VCC
VSS
VCLK
Supply Voltage
Ground
Clock Transmit only mode
WC Write Control
June 2002
VSS
AI01741
Note: WC signal is only available for ST24LW21 and ST24FW21
products.
1/22






ST24LW21 Datasheet, Funktion
ST24LC21B, ST24LW21, ST24FC21, ST24FC21B, ST24FW21
Figure 5. Error Recovery Mechanism Flowchart for the ST24FC21, ST24FC21B and ST24FW21
products
Transition
State
(VESA 2)
Memory Power On
Internal Address Pointer = 0
VCLK YES
NO
NO SCL
YES
SDA Hi-Z
VCLK Internal Counter = 0
Start Internal 2 sec Timer
Send Data bit (MSB first) pointed
by the Address Pointer and
auto-increment pointed bit/byte
Transmit-Only Mode
(DDC1)
SCL YES
NO
Valid
I2C access
(START + Device Select)
?
YES
Reset VCLK Internal Counter
and Reset Internal Timer
NO VCLK
YES
Increment VCLK Counter
NO Counter = 128
or Timer > 2 sec
YES
Switch Back to
Transmit-Only Mode
I2C communication idle
waiting for a Device Select byte
Reset Counter and Timer
Send Acknowledge
Respond to the Incoming
I2C Command
AI01748
I2C Mode
(DDC2B)
6/22

6 Page









ST24LW21 pdf, datenblatt
ST24LC21B, ST24LW21, ST24FC21, ST24FC21B, ST24FW21
Figure 7. AC Waveforms
SCL
SDA IN
tCHCL
tCLCH
tDLCL
tDXCX
tCHDX
START
CONDITION
tCLDX
SDA
SDA
INPUT CHANGE
tCHDH
tDHDL
STOP &
BUS FREE
SCL
SDA OUT
tCLQV
DATA VALID
tCLQX
DATA OUTPUT
SCL
SDA IN
tDHDL
tCHDH
STOP
CONDITION
tW
WRITE CYCLE
tCHDX
START
CONDITION
VCLK
SDA
SCL
tVCHVCL
tVCHQX
tVCLVCH
tCLQZ
AI01503
12/22

12 Page





SeitenGesamt 22 Seiten
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