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PDF MAX395 Data sheet ( Hoja de datos )
| Número de pieza | MAX395 | |
| Descripción | Serially Controlled / Low-Voltage / 8-Channel SPST Switch | |
| Fabricantes | Maxim Integrated | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de MAX395 (archivo pdf) en la parte inferior de esta página. Total 16 Páginas | ||
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19-0448; Rev 0; 11/95
Serially Controlled, Low-Voltage,
8-Channel SPST Switch
_______________General Description ____________________________Features
The MAX395 8-channel, serially controlled, single-pole/sin-
gle-throw (SPST) analog switch offers eight separately
controlled switches. The switches conduct equally well in
either direction. On-resistance (100Ω max) is matched
between switches to 5Ω max and is flat (10Ω max) over
the specified signal range.
These CMOS devices can operate continuously with
dual power supplies ranging from ±2.7V to ±8V or a
single supply between +2.7V and +16V. Each switch
can handle rail-to-rail analog signals. The off leakage
current is only 0.1nA at +25°C or 5nA at +85°C.
Upon power-up, all switches are off, and the internal shift
registers are reset to zero. The MAX395 is electrically
equivalent to two MAX391 quad switches controlled by a
serial interface, and is pin compatible with the MAX335.
The serial interface is compatible with SPI™/QSPI™ and
Microwire™. Functioning as a shift register, it allows data
(at DIN) to be clocked in synchronously with the rising
edge of clock (SCLK). The shift register’s output (DOUT)
enables several MAX395s to be daisy chained.
All digital inputs have 0.8V to 2.4V logic thresholds, ensur-
ing both TTL- and CMOS-logic compatibility when using
±5V supplies or a single +5V supply.
________________________Applications
Serial Data-Acquisition Industrial and Process-
Systems
Control Systems
Avionics
ATE Equipment
o SPI™/QSPI™, Microwire™-Compatible Serial
Interface
o 8 Separately Controlled SPST Switches
o 100Ω Signal Paths with ±5V Supplies
o Rail-to-Rail Signal Handling
o Asynchronous RESET Input
o Pin Compatible with Industry-Standard MAX335
o ±2.7V to ±8V Dual Supplies
+2.7V to +16V Single Supply
o >2kV ESD Protection per Method 3015.7
o TTL/CMOS-Compatible Inputs (with +5V or
±5V Supplies)
______________Ordering Information
PART
TEMP. RANGE PIN-PACKAGE
MAX395CNG
0°C to +70°C 24 Narrow Plastic DIP
MAX395CWG
0°C to +70°C 24 Wide SO
MAX395C/D
0°C to +70°C Dice*
MAX395ENG -40°C to +85°C 24 Narrow Plastic DIP
MAX395EWG -40°C to +85°C 24 Wide SO
MAX395MRG -55°C to +125°C 24 Narrow CERDIP**
* Contact factory for dice specifications.
** Contact factory for availability.
Audio Signal Routing
Networking
__________________Pin Configuration
________________Functional Diagram
NO0 NO7
TOP VIEW
SCLK 1
V+ 2
DIN 3
GND 4
NO0 5
MAX395
LOGIC
24 CS
23 RESET
22 DOUT
21 V-
20 NO7
COM0
COM7
PARALLEL REGISTER AND TRANSLATOR
COM0 6
NO1 7
19 COM7
18 NO6
DIN 8-BIT SHIFT REGISTER
DOUT
COM1 8
NO2 9
COM2 10
NO3 11
COM3 12
DIP/SO
17 COM6
16 NO5
15 COM5
14 NO4
13 COM4
RESET
SCLK
CLOCK TRANSLATOR
CS CS TRANSLATOR
MAX395
LATCH
SPI and QSPI are trademarks of Motorola, Inc. Microwire is a trademark of National Semiconductor Corp.
________________________________________________________________ Maxim Integrated Products 1
Call toll free 1-800-998-8800 for free samples or literature.
1 page  
Serially Controlled, Low-Voltage,
8-Channel SPST Switch
ELECTRICAL CHARACTERISTICS—Single +5V Supply
(V+ = +4.5V to +5.5V, V- = 0V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER
ANALOG SWITCH
Analog Signal Range
COM, NO On-Resistance
NO Off Leakage Current
(Notes 4, 5)
COM Off Leakage Current
(Notes 4, 5)
COM On Leakage Current
(Notes 4, 5)
DIGITAL I/O
DIN, SCLK, CS, RESET Input
Voltage Logic Threshold High
SYMBOL
CONDITIONS
MIN TYP
(Note 2)
VCOM, VNO
RON
INO(OFF)
ICOM(OFF)
ICOM(ON)
V+ = 5V, VCOM = 3.5V,
INO = 1mA
V+ = 5.5V, VCOM = 4.5V,
VNO = 0V
V+ = 5.5V, VCOM = 0V,
VNO = 4.5V
V+ = 5.5V, VCOM = 4.5V,
VNO = 0V
V+ = 5.5V, VCOM = 0V,
VNO = 4.5V
V+ = 5.5V,
VCOM = VNO = 4.5V
C, E, M
TA = +25°C
C, E, M
TA = +25°C
C, E, M
TA = +25°C
C, E, M
TA = +25°C
C, E, M
TA = +25°C
C, E, M
TA = +25°C
C, E, M
V-
-0.1
-10
-0.1
-10
-0.1
-10
-0.1
-10
-0.2
-20
125
0.002
0.002
0.002
0.002
0.002
VIH
C, E, M
2.4
DIN, SCLK, CS, RESET Input
Voltage Logic Threshold Low
VIL
C, E, M
DIN, SCLK, CS, RESET Input
Current Logic High or Low
IIH, IIL
DOUT Output Voltage Logic High VDOUT
DOUT Output Voltage Logic Low
VDOUT
SCLK Input Hysteresis
SCLKHYST
SWITCH DYNAMIC CHARACTERISTICS
Turn-On Time
tON
Turn-Off Time
Break-Before-Make Delay
Charge Injection (Note 4)
Off Isolation (Note 6)
Channel-to-Channel Crosstalk
(Note 7)
POWER SUPPLY
V+, V- Supply Current
tOFF
tBBM
VCTE
VISO
VCT
I+
VDIN, VSCLK,
VCS = 0.8V or 2.4V
IDOUT = -0.8mA
IDOUT = 1.6mA
C, E, M
C, E, M
C, E, M
C, E, M
From rising edge of CS
From rising edge of CS
From rising edge of CS
CL = 1nF, VNO = 0V, RS = 0Ω
RL = 50Ω, CL = 15pF,
VNO = 1VRMS, f = 100kHz
RL = 50Ω, CL = 15pF,
VNO = 1VRMS, f = 100kHz
TA = +25°C
C, E, M
TA = +25°C
C, E, M
TA = +25°C
TA = +25°C
TA = +25°C
TA = +25°C
DIN = CS = SCLK = 0V or
V+, RESET = 0V or V+
TA = +25°C
C, E, M
-1
2.8
0
0.03
100
200
90
15
2
-90
<-90
7
MAX UNITS
V+ V
175
Ω
225
0.1
10
nA
0.1
10
0.1
10
nA
0.1
10
0.2
nA
20
V
0.8 V
1 µA
V+ V
0.4 V
mV
400
ns
500
400
ns
500
ns
10 pC
dB
dB
20
µA
30
_______________________________________________________________________________________ 5
5 Page 
Serially Controlled, Low-Voltage,
8-Channel SPST Switch
_______________Detailed Description
Basic Operation
The MAX395’s interface can be thought of as an 8-bit
shift register controlled by CS (Figure 2). While CS is
low, input data appearing at DIN is clocked into the
shift register synchronously with SCLK’s rising edge.
The data is an 8-bit word, each bit controlling one of
eight switches in the MAX395 (Table 1). DOUT is the
shift register’s output, with data appearing synchro-
nously with SCLK’s falling edge. Data at DOUT is sim-
ply the input data delayed by eight clock cycles.
When shifting the input data, D7 is the first bit in and
out of the shift register. While shifting data, the switches
remain in their previous configuration. When the eight
bits of data have been shifted in, CS is driven high. This
updates the new switch configuration and inhibits fur-
ther data from entering the shift register. Transitions at
DIN and SCLK have no effect when CS is high, and
DOUT holds the first input bit (D7) at its output.
More or less than eight clock cycles can be entered
during the CS low period. When this happens, the shift
register will contain only the last eight serial data bits,
regardless of when they were entered. On the rising
edge of CS, all the switches will be set to the corre-
sponding states.
The MAX395’s three-wire serial interface is compatible
with SPI™, QSPI™, and Microwire™ standards. If inter-
facing with a Motorola processor serial interface, set
CPOL = 0. The MAX395 is considered a slave device
(Figures 2 and 3). Upon power-up, the shift register
contains all zeros, and all switches are off.
The latch that drives the analog switch is updated on
the rising edge of CS, regardless of SCLK’s state. This
meets all the SPI and QSPI requirements.
Daisy Chaining
For a simple interface using several MAX395s, “daisy
chain” the shift registers as shown in Figure 5. The CS
pins of all devices are connected together, and a
stream of data is shifted through the MAX395s in series.
When CS is brought high, all switches are updated
simultaneously. Additional shift registers may be includ-
ed anywhere in series with the MAX395 data chain.
CS
SCLK
DIN
DOUT
COM OUT
tCSH0
tCSS
tCH
tDS
tDH
tCL
tDO
•••
•••
•••
•••
•••
tCSH2
tCLL
tOFF
tCSH1
Figure 1. Timing Diagram
______________________________________________________________________________________ 11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet MAX395.PDF ] | |
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