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PDF MAX3003EUP Data sheet ( Hoja de datos )

Número de pieza MAX3003EUP
Descripción +1.2V to +5.5V / 15kV ESD-Protected / 0.1A / 35Mbps / 8-Channel Level Translators
Fabricantes Maxim Integrated 
Logotipo Maxim Integrated Logotipo



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MAX3000E/MAX3001E/
AVAILABLE
MAX3002–MAX3012
+1.2V to +5.5V, ±15kV ESD-Protected, 0.1µA,
35Mbps, 8-Channel Level Translators
General Description
The MAX3000E/MAX3001E/MAX3002–MAX3012
8-channel level translators provide the level shifting nec-
essary to allow data transfer in a multivoltage system.
Externally applied voltages, VCC and VL, set the logic lev-
els on either side of the device. Logic signals present on
the VL side of the device appear as a higher voltage logic
signal on the VCC side of the device, and vice-versa.
The MAX3000E/MAX3001E/MAX3002/MAX3003 use an
architecture specifically designed to be bidirectional
without the use of a directional pin.
The MAX3000E/MAX3001E/MAX3002/MAX3004–MAX3012
feature an EN input that, when low, reduces the VCC and
VL supply currents to < 2µA. The MAX3000E/MAX3001E
also have ±15kV ESD protection on the I/O VCC side for
greater protection in applications that route signals
externally. The MAX3000E operates at a guaranteed data
rate of 230kbps. The MAX3001E operates at a guaranteed
data rate of 4Mbps. The MAX3002–MAX3012 operate at a
guaranteed data rate of 20Mbps over the entire specified
operating voltage range.
The MAX3000E/MAX3001E/MAX3002–MAX3012 accept
VL voltages from +1.2V to +5.5V and VCC voltages from
+1.65V to +5.5V, making them ideal for data transfer
between low-voltage ASICs/PLDs and higher voltage
systems. The MAX3000E/MAX3001E/MAX3002–
MAX3012 are available in 20-bump UCSP™, 20-pin
TQFN (5mm x 5mm), and 20-pin TSSOP packages.
Features
Guaranteed Data Rate Options
230kbps (MAX3000E)
4Mbps (MAX3001E)
20Mbps (MAX3002–MAX3012)
Bidirectional Level Translation Without Using a
Directional Pin (MAX3000E/MAX3001E/MAX3002/
MAX3003)
Unidirectional Level Translation
(MAX3004–MAX3012)
Operation Down to +1.2V on VL
±15kV ESD Protection on I/O VCC Lines
(MAX3000E/MAX3001E)
Ultra-Low 0.1µA Supply Current in Shutdown
Low Quiescent Current (< 10µA)
UCSP, TQFN, and TSSOP Packages
Ordering Information
PART
TEMP RANGE PIN-PACKAGE
MAX3000EEUP
MAX3000EEBP-T
-40°C to +85°C
-40°C to +85°C
20 TSSOP
4 x 5 UCSP
Ordering Information continued at end of data sheet.
Note: All devices operate over the -40°C to +85°C operating
temperature range.
FunctionaAlpDpilaicgartaimonss
CMOS Logic-Level Translation
Cellphones
SPI™ and MICROWIRE™ Level Translation
Low-Voltage ASIC Level Translation
Smart Card Readers
Cellphone Cradles
Portable POS Systems
Portable Communication Devices
Low-Cost Serial Interfaces
GPS
Telecommunications Equipment
UCSP is a trademark of Maxim Integrated Products, Inc.
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FMunICcRtiOonWaIlRDEiaisgraamtrasdceomnatrinkuoefdNatioenadl oSfedmaitcaonsdheuecto. r.
UCSP is a trademark of Maxim Integrated Products, Inc.
Typical Operating Circuit
+1.8V
+3.3V
+1.8V
SYSTEM
CONTROLLER
DATA
VL VCC
EN
MAX3000E
MAX3001E
MAX3002–
MAX3012
I/O VL_
I/O VCC_
GND
+3.3V
SYSTEM
DATA
Pin Configurations and Functional Diagrams appear at end
of data sheet.
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
19-2672; Rev 5; 8/08

1 page




MAX3003EUP pdf
MAX3000E/MAX3001E/MAX3002–MAX3012
+1.2V to +5.5V, ±15kV ESD-Protected, 0.1µA,
35Mbps, 8-Channel Level Translators
TIMING CHARACTERISTICS (continued)
(VCC = +1.65V to +5.5V, VL = +1.2V to VCC, EN = VL (MAX3000E/MAX3001E/MAX3002/MAX3004–MAX3012), EN A/B = VL or 0
(MAX3003), TA = TMIN to TMAX. Typical values are at VCC = +1.65V, VL = +1.2V, and TA = +25°C.) (Notes 1, 2)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
RS = 50Ω, CVCC = 50pF, CVL = 50pF,
MAX3000E
500
Channel-to-Channel Skew
tSKEW
RS = 50Ω, CVCC = 50pF, CVL = 50pF,
MAX3001E
10 ns
RS = 50Ω, CVCC = 50pF, CVL = 15pF,
MAX3002–MAX3012
5
RS = 50Ω, CVCC = 50pF, CVL = 50pF,
ΔTA = +20°C, MAX3000E (Note 3)
800
Part-to-Part Skew
Propagation Delay from
I/O VL _ to I/O VCC_ after EN
Propagation Delay from
I/O VCC_ to I/O VL _ after EN
Maximum Data Rate
tPPSKEW
tEN-VCC
tEN-VL
RS = 50Ω, CVCC = 50pF, CVL = 50pF,
ΔTA = +20°C, MAX3001E (Note 3)
RS = 50Ω, CVCC = 50pF, CVL = 15pF,
ΔTA = +20°C, MAX3002–MAX3012 (Note 3)
CVCC = 50pF, MAX3000E/MAX3001E,
MAX3002–MAX3012, Figure 3
CVL = 50pF, MAX3000E/MAX3001E/
MAX3002/MAX3004–MAX3012, Figure 4
CVL = 15pF, MAX3003, Figure 4
RS = 50Ω, CVCC = 50pF, CVL = 50pF,
MAX3000E
RS = 50Ω, CVCC = 50pF, CVL = 50pF,
MAX3001E
RS = 50Ω, CVCC = 50pF, CVL = 15pF,
MAX3002–MAX3012
230
4
20
30 ns
10
2 µs
2
µs
2
kbps
Mbps
Note 3: VCC from device 1 must equal VCC of device 2; VL from device 1 must equal VL of device 2.
Maxim Integrated
5

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MAX3003EUP arduino
MAX3000E/MAX3001E/MAX3002–MAX3012
+1.2V to +5.5V, ±15kV ESD-Protected, 0.1µA,
35Mbps, 8-Channel Level Translators
MAX3003
TSSOP
1
2
3
4
5
6
7
8
9
PIN
UCSP
B1
A1
A2
B2
A3
B3
A4
B4
A5
10 B5
11 C5
12 D5
13 C4
14 D4
15 C3
16 D3
17 C2
18 D2
19 D1
20 C1
——
TQFN
19
20
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
EP
Pin Description (continued)
NAME
FUNCTION
I/O VL1A
VL
I/O VL2A
I/O VL3A
I/O VL4A
I/O VL1B
I/O VL2B
I/O VL3B
I/O VL4B
EN A/B
GND
I/O VCC4B
I/O VCC3B
I/O VCC2B
I/O VCC1B
I/O VCC4A
I/O VCC3A
I/O VCC2A
Input/Output 1A, Referenced to VL
Logic Input Voltage, +1.2V VL VCC. Bypass VL to GND with a 0.1µF capacitor.
Input/Output 2A, Referenced to VL
Input/Output 3A, Referenced to VL
Input/Output 4A, Referenced to VL
Input/Output 1B, Referenced to VL
Input/Output 2B, Referenced to VL
Input/Output 3B, Referenced to VL
Input/Output 4B, Referenced to VL
Enable Input. If EN A/B is pulled low, channels 1B through 4B are active, and channels
1A through 4A are in three-state. If EN A/B is driven high to VL, channels 1A through 4A
are active, and channels 1B through 4B are in three-state.
Ground
Input/Output 4B, Referenced to VCC
Input/Output 3B, Referenced to VCC
Input/Output 2B, Referenced to VCC
Input/Output 1B, Referenced to VCC
Input/Output 4A, Referenced to VCC
Input/Output 3A, Referenced to VCC
Input/Output 2A, Referenced to VCC
VCC VCC Input Voltage, +1.65V VCC +5.5V. Bypass VCC to GND with a 0.1µF capacitor.
I/O VCC1A Input/Output 1A, Referenced to VCC
EP Exposed Pad. Connect to GND.
Maxim Integrated
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