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PDF SP706 Data sheet ( Hoja de datos )
| Número de pieza | SP706 | |
| Descripción | Low Power Microprocessor Supervisory Circuits | |
| Fabricantes | Sipex | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de SP706 (archivo pdf) en la parte inferior de esta página. Total 18 Páginas | ||
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®
SP705-708/813L/813M
Low Power Microprocessor Supervisory Circuits
s Precision Voltage Monitor:
SP705/707/813L at 4.65V
SP706/708/813M at 4.40V
s RESET Pulse Width - 200ms
s Independent Watchdog Timer - 1.6s
Timeout (SP705/706/813L/813M)
s 60µA Maximum Supply Current
s Debounced TTL/CMOS Manual Reset Input
s RESET Asserted Down to VCC = 1V
s Voltage Monitor for Power Failure or Low
Battery Warning
s Available in 8-pin PDIP, NSOIC, and
µSOIC packages
s Pin Compatible Enhancement to Industry Standard 705-708/813L Series
s Functionally Compatible to Industry Standard 1232 Series
DESCRIPTION…
The SP705-708/813L/813M series is a family of microprocessor (µP) supervisory circuits that
integrate myriad components involved in discrete solutions which monitor power-supply and
battery in µP and digital systems. The SP705-708/813L/813M series will significantly improve
system reliability and operational efficiency when compared to solutions obtained with discrete
components. The features of the SP705-708/813L/813M series include a watchdog timer,
a µP reset, a Power Fail Comparator, and a manual-reset input. The SP705-708/813L/813M
series is ideal for applications in automotive systems, computers, controllers, and intelligent
instruments. The SP705-708/813L/813M series is an ideal solution for systems in which critical
monitoring of the power supply to the µP and related digital components is demanded.
Part
Number
SP705
SP706
SP707
SP708
SP813L
SP813M
RESET
Threshold
RESET
Active
Manual
RESET
4.65 V
4.40 V
4.65 V
4.40 V
4.65 V
4.40V
LOW
LOW
LOW and HIGH
LOW and HIGH
HIGH
HIGH
YES
YES
YES
YES
YES
YES
Watchdog
YES
YES
NO
NO
YES
YES
PFI
Accuracy
4%
4%
4%
4%
4%
4%
SP705DS/09
SP705 Low Power Microprocessor Supervisory Circuits
1
© Copyright 2000 Sipex Corporation
1 page  
WDI
MR
VCC
WATCHDOG
TRANSITION
DETECTOR
VCC
250µA
WATCHDOG
TIMER
TIMEBASE FOR
RESET AND
WATCHDOG
RESET
GENERATOR
WDO
RESET/RESET*
4.65V
(4.40V for the SP706 and SP813M)
PFI
PFO
1.25V
SP705
SP706
SP813L
SP813M
GND
* For the SP813L/813M only
Figure 2. Internal Block Diagram for the SP705/706/813L/813M
VCC
250µA
MR
VCC
RESET
GENERATOR
4.65V
(4.40V for the SP708)
PFI
1.25V
GND
Figure 3. Internal Block Diagram for the SP707/708
RESET
RESET
PFO
SP707
SP708
SP705DS/09
SP705 Low Power Microprocessor Supervisory Circuits
5
© Copyright 2000 Sipex Corporation
5 Page 
Power-Fail Comparator
The power-fail comparator can be used for
various purposes because its output and
noninverting input are not internally connected.
The inverting input is internally connected to a
1.25V reference.
To build an early-warning circuit for power
failure, connect the PFI pin to a voltage divider
as shown in Figure 16. Choose the voltage
divider ratio so that the voltage at PFI falls
below 1.25V just before the +5V regulator drops
out. Use PFO to interrupt the µP so it can
prepare for an orderly power-down.
Manual Reset
The manual-reset input (MR) allows RESET to
be triggered by a pushbutton switch. The switch
is effectively debounced by the 140ms mini-
mum RESET pulse width. MR is TTL/CMOS
logic compatible, so it can be driven by an
external logic line. MR can be used to force a
watchdog timeout to generate a RESET pulse
in the SP705/706/813L/813M. Simply connect
WDO to MR.
Ensuring a Valid RESET Output Down to
VCC = 0V
When VCC falls below 1V, the SP705/706/707/
708 RESET output no longer sinks current, it
becomes an open circuit. High-impedance
CMOS logic inputs can drift to undetermined
voltages if left undriven. If a pull-down resistor
is added to the RESET pin, any stray charge or
leakage currents will be shunted to ground,
holding RESET LOW. The resistor value is not
critical. It should be about 100KΩ, large enough
not to load RESET and small enough to pull
RESET to ground.
Monitoring Voltages Other Than the
Unregulated DC Input
Monitor voltages other than the unregulated DC
by connecting a voltage divider to PFI and
adjusting the ratio appropriately. If required,
add hysteresis by connecting a resistor (with a
value approximately 10 times the sum of the
two resistors in the potential divider network)
between PFI and PFO. A capacitor between PFI
and GND will reduce the power-fail circuit's
Regulated +5V
Power Supply
Unregulated DC
Power Supply
VCC 0.1µF
µP RESET
RESET
INTERRUPT PFO
VCC
PFI
I/O LINE
NMI
GND
PFI
WDO
SP705
SP706
SP813L
SP813M
MR
GND
R1
R2
PUSHBUTTON
SWITCH
to µP
+5V +12V
MR
PFO
RESET
VCC 1MΩ
1%
PFI
130KΩ
1%
GND
Figure 16. Typical Operating Circuit
Figure 17. Monitoring Both +5V and +12V Power
Supplies
SP705DS/09
SP705 Low Power Microprocessor Supervisory Circuits
11
© Copyright 2000 Sipex Corporation
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet SP706.PDF ] | |
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