PDF STA304 Data sheet ( Hoja de datos )

Número de pieza	STA304
Descripción	DIGITAL AUDIO PROCESSOR
Fabricantes	ST Microelectronics
Logotipo
Hay una vista previa y un enlace de descarga de STA304 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas
No Preview Available ! STA304 DIGITAL AUDIO PROCESSOR WITH MULTICHANNEL DDX™ END TO END DIGITAL AUDIO INTEGRATED SOLUTION · DSP Functions: - DIGITAL VOLUME CONTROL - SOFT MUTE - BASS and TREBLE - PARAMETRIC EQ PER CHANNEL - BASS MANAGEMENT FOR SUBWOOFER - AUTO MUTE ON ZERO INPUT DETECTION 4+1 DIRECT DIGITAL AMPLIFICATION (DDX™) OUTPUT CHANNELs 6 CHANNELs PROGRAMMABLE SERIAL OUTPUT INTERFACE (by default I2S) 4 CHANNELs PROGRAMMABLE SERIAL INPUT INTERFACE (by default I2S) STEREO S/PDIF INPUT INTERFACE Intel AC'97 LINK (rev. 2.1) INPUT INTERFACE FOR AUDIO AND CONTROL ON CHIP AUTOMATIC INPUT SAMPLING FREQUENCY DETECTION 100 dB SNR SAMPLE RATE CONVERTER (1KHz SINUSOIDAL INPUT) I2C CONTROL BUS - LOW POWER 3.3V CMOS TECHNOLOGY )BLOCK DIAGRAM t(sSCL SDA 10 9 ucLRCKI/ SYNC dBICKI / BIT_CL 3 4 roSDI_1 / SDATA_OUT 1 SDI_2 / SDATA_IN 2 PRXP 18 bsolete RXN 19 I2S S/PDIF I2C SRC AC`97 TQFP44 )ORDERING NUMBER: STA304 ct(s EMBEDDED PLL FOR INTERNAL CLOCK uGENERATION (1024x48 kHz = 49.152 MHz) d 24.576 MHz EXTERNAL INPUT CLOCK OR roBUILT-IN INDUSTRY STANDARD XTAL POSCILLATOR. te1.0 DESCRIPTION leThe STA304 Digital Audio Processor is a single chip device implementing end to end digital solution for oaudio application. In conjunction with STA500 power sbridge it gives the full digital DSP-to-power high qual- bity chain with no need for audio Digital-to-Analog con- Overters between DSP and power stage. ROM DSP RAM DDX I2S 29 LEFT_B 30 LEFT_A 27 RIGHT_B 28 RIGHT_A 33 SLEFT_A 34 SLEFT_B 23 SRIGHT_A 24 SRIGHT_B 21 LFE_A 22 LFE_B 43 LRCKO 43 BICKO 43 SDO_1 43 SDO_2 43 SDO_3 RESET 7 PLL PowerDown 35 EAPD 11 14 15 43 44 SA XTI XTO CKOUT PWDN April 2010 1/31 1 page STA304 ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit VDD Power Supply -0.3 to 4 V Vi Voltage on input pins -0.3 to VDD+0.3 V Vo Voltage on output pins -0.3 to VDD+0.3 V Tstg Storage Temperature -40 to +150 °C Top Operative ambient temperature -20 to +85 °C PDD Power Consumption Digital tbd mW PDA Power Consumption Analog tbd mW uct(s)THERMAL DATA dSymbol Parameter roRthj-amb Thermal resistance Junction to Ambient Value 85 Unit °C/W solete PELECTRICAL CHARACTERISTCS (VDD from 2.9V up to 3.4V; Tamb = 0 to 70 °C; unless otherwise specified) bDC OPERATING CONDITIONS OSymbol Parameter Value ) -VDD Power Supply Voltage 3.0 to 3.6V t(sTj Operating Junction Temperature -20 to 125 °C ducGENERAL INTERFACE ELECTRICAL CHARACTERISTICS roSymbol Parameter Test Condition Min. Typ. Max. Unit Note PIil Low Level Input Current Without Vi = 0V pull-up device -10 10 µA 1 teIih High Level Input Current le Without pull-up device Vi = VDD = 3.6V -10 10 µA 1 o Vesd Electrostatic Protection Leakage < 1µA 2000 V2 bs Note 1: The leakage currents are generally very small, < 1na. The value given here is a maximum that can occur after an electrostatic stress on the pin. Note 2: Human Body Model 5/31 5 Page STA304 6.0 SAMPLE RATE CONVERTER The sample rate converter resamples the selected input data source in order to send to the DSP an audio stream with a fixed frequency of 48 KHz. The following picture show the basic architecture. Figure 4. DATA_IN Interpolation 2 x Fs FIR x2 Fs Anti-Alias FILT Fs Interpolation 4xFs or 2xFs FIR x2 Sinc 6 Async. DATA_OUT 48KHz Thresh. Selector LRCK_IN DRLL RATIO ct(s)The selection between X2 Fir interpolation or direct antialiasing Filter on input data is made automatically by the uthreshold selector block. If the input sampling frequency (measured by DRLL) is high than the SRC threshold d(see Table 2 section 12.9), the direct antialising filter is selected, otherwise if the input frequency is lower than rothe SRC threshold, the X2 FIR filter is added the data path. A 1kHz hysteresis is fixed around the SRC threshold nominal values of tab. 2 section 12.9, to prevent unstable oscillations. In figure 5 the DRLL lock phase is shown Pfor 32kHz,44.1kHz, 48kHz and 96kHz input frequency. Note that only after this phase (including the flat part of tethe graph) the SRC performances are in spec. leFigure 5. DRLL lock delay sox 104 10 Ob9 ) -8 t(s7 uc6 rod5 P4 lete 3 bso 2 1 0 0 0.05 0.1 0.15 0.2 0.25 Second 11/31 11 Page

Páginas	Total 30 Páginas
PDF Descargar	[ Datasheet STA304.PDF ]

Hoja de datos destacado

Número de pieza	Descripción	Fabricantes
STA3005	Dual IF AM/FM Digital Radio Receiver	ST Microelectronics
STA301A	NPN Darlington	Sanken electric
STA302A	PNP Darlington General purpose/3-phase motor drive	Sanken electric
STA303A	NPN Darlington General purpose/3-phase motor drive	Sanken electric

Número de pieza	Descripción	Fabricantes
SLA6805M	High Voltage 3 phase Motor Driver IC.	Sanken
SDC1742	12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.	Analog Devices

DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.

DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar