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PDF 28C16A Data sheet ( Hoja de datos )
| Número de pieza | 28C16A | |
| Descripción | 16K (2K x 8) CMOS EEPROM | |
| Fabricantes | Microchip Technology | |
| Logotipo |  |
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28C16A
16K (2K x 8) CMOS EEPROM
FEATURES
• Fast Read Access Time—150 ns
• CMOS Technology for Low Power Dissipation
- 30 mA Active
- 100 µA Standby
• Fast Byte Write Time—200 µs or 1 ms
• Data Retention >200 years
• High Endurance - Minimum 104 Erase/Write Cycles
• Automatic Write Operation
- Internal Control Timer
- Auto-Clear Before Write Operation
- On-Chip Address and Data Latches
• Data polling
• Chip Clear Operation
• Enhanced Data Protection
- VCC Detector
- Pulse Filter
- Write Inhibit
• Electronic Signature for Device Identification
• 5-Volt-Only Operation
• Organized 2Kx8 JEDEC Standard Pinout
• 24-pin Dual-In-Line Package
• 32-pin PLCC Package
• 28-pin Thin Small Outline Package (TSOP)
8x20mm
• 28-pin Very Small Outline Package (VSOP)
8x13.4mm
• Available for Extended Temperature Ranges:
- Commercial: 0˚C to +70˚C
- Industrial: -40˚C to +85˚C
DESCRIPTION
The Microchip Technology Inc. 28C16A is a CMOS 16K
non-volatile electrically Erasable PROM. The 28C16A
is accessed like a static RAM for the read or write
cycles without the need of external components. Dur-
ing a “byte write”, the address and data are latched
internally, freeing the microprocessor address and data
bus for other operations. Following the initiation of
write cycle, the device will go to a busy state and auto-
matically clear and write the latched data using an
internal control timer. To determine when a write cycle
is complete, the 28C16A uses Data polling. Data poll-
ing allows the user to read the location last written to
when the write operation is complete. CMOS design
and processing enables this part to be used in systems
where reduced power consumption and reliability are
required. A complete family of packages is offered to
provide the utmost flexibility in applications.
PACKAGE TYPES
A7 • 1
A6 2
A5 3
A4 4
A3 5
A2 6
A1 7
A0 8
I/O0 9
I/O1 10
I/O2 11
VSS 12
24 Vcc
23 A8
22 A9 A6 5
21 WE A5 6
20 OE
A4 7
A3 8
19 A10 A2 9
18 CE A1 10
17 I/O7 A0 11
16 I/O6 NC 12
15 I/O5 I/O0 13
14 I/O4
13 I/O3
29 A8
28 A9
27 NC
26 NC
25 OE
24 A10
23 CE
22 I/O7
21 I/O6
• Pin 1 indicator on PLCC on top of package
OE 1
NC 2
A9 3
A8 4
NC 5
WE 6
Vcc 7
28 A10
27 CE
26 I/07
25 I/06
24 I/05
23 I/04
22 I/03
NC 8
NC 9
A7 10
A6 11
A5 12
A4 13
A3 14
21 Vss
20 I/02
19 I/01
18 I/00
17 A0
16 A1
15 A2
OE 22
NC 23
A9 24
A8 25
NC 26
WE 27
VCC 28
NC 1
NC 2
A7 3
A6 4
A5 5
A4 6
A3 7
21 A10
20 CE
19 I/O7
18 I/O6
17 I/O5
16 I/O4
15 I/O3
14 VSS
13 I/O2
12 I/O1
11 I/O0
10 A0
9 A1
8 A2
BLOCK DIAGRAM
I/O0 I/O7
VSS
VCC
CE
OE
WE
A0
A10
Data Protection
Circuitry
Chip Enable/
Output Enable
Control Logic
Auto Erase/Write
Timing
Program Voltage
Generation
Data
Poll
Y
L Decoder
a
t
c
h
eX
s Decoder
Input/Output
Buffers
Y Gating
16K bit
Cell Matrix
© 1996 Microchip Technology Inc.
This document was created with FrameMaker 4 0 4
DS11125G-page 1
1 page  
FIGURE 1-3: DATA POLLING WAVEFORMS
VIH
Address
VIL
VIH
CE
VIL
VIH
WE
VIL
VIH
OE
VIL
VIH
Data
VIL
Address Valid
t WPL
t WPH
t DV
Data In
Valid
t WC
28C16A
t ACC
t CE
Last Written
Address Valid
t OE
I/O7 Out
True Data Out
FIGURE 1-4: CHIP CLEAR WAVEFORMS
VIH
CE
VIL
VH
OE
VIH
VIH
WE
VIL
tS
tW
tH
tW = 10ms
tS = tH = 1µs
VH = 12.0V ±0.5V
TABLE 1-5: SUPPLEMENTARY CONTROL
Mode
Chip Clear
Extra Row Read
Extra Row Write
Note 1: VH = 12.0V±0.5V
CE OE WE A9
VIL VH VIL
X
VIL VIL VIH A9 = VH
* VIH * A9 = VH
* Pulsed per programming waveforms.
VCC
I/OI
VCC
VCC Data Out
VCC Data In
© 1996 Microchip Technology Inc.
DS11125G-page 5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet 28C16A.PDF ] | |
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