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PDF LTC1410I Data sheet ( Hoja de datos )
| Número de pieza | LTC1410I | |
| Descripción | 12-Bit/ 1.25Msps Sampling A/D Converter with Shutdown | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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LTC1410
12-Bit, 1.25Msps Sampling
A/D Converter with Shutdown
FEATURES
s 1.25Msps Sample Rate
s Power Dissipation: 160mW
s 71dB S/(N + D) and 82dB THD at Nyquist
s No Pipeline Delay
s Nap (7mW) and Sleep (10µW) Shutdown Modes
s Operates with Internal 15ppm/°C Reference
or External Reference
s True Differential Inputs Reject Common Mode Noise
s 20MHz Full Power Bandwidth Sampling
s ±2.5V Bipolar Input Range
s 28-Pin SO Wide Package
APPLICATI S
s Telecommunications
s Digital Signal Processing
s Multiplexed Data Acquisition Systems
s High Speed Data Acquisition
s Spectrum Analysis
s Imaging Systems
DESCRIPTIO
The LTC®1410 is a 0.65µs, 1.25Msps, 12-bit sampling
A/D converter that draws only 160mW from ±5V supplies.
This easy-to-use device includes a high dynamic range
sample-and-hold, a precision reference and requires no
external components. Two digitally selectable power shut-
down modes provide flexibility for low power systems.
The LTC1410’s full-scale input range is ±2.5V. Maximum
DC specifications include ±1LSB INL and ±1LSB DNL over
temperature. Outstanding AC performance includes 71dB
S/(N + D) and 82dB THD at the Nyquist input frequency of
625kHz.
The unique differential input sample-and-hold can acquire
single-ended or differential input signals up to its 20MHz
bandwidth. The 60dB common mode rejection allows
users to eliminate ground loops and common mode noise
by measuring signals differentially from the source.
The ADC has a µP compatible, 12-bit parallel output port.
There is no pipeline delay in the conversion results. A
separate convert start input and a data ready signal (BUSY)
ease connections to FIFOs, DSPs and microprocessors.
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATI
+
10µF
Complete 1.25MHz, 12-Bit Sampling A/D Converter
DIFFERENTIAL
ANALOG INPUT
(–2.5V TO 2.5V)
2.50V
VREF OUTPUT
1
2
3
4
0.1µF
5
6
7
8
9
10
12-BIT
PARALLEL
BUS
11
12
13
14
LTC1410
+AIN
–AIN
VREF
REFCOMP
AGND
D11(MSB)
D10
D9
D8
D7
D6
D5
D4
DGND
AVDD
DVDD
VSS
BUSY
CS
CONVST
RD
SHDN
NAP/SLP
OGND
D0
D1
D2
D3
28
27
26
25
24
23
22
21
20
19
18
17
16
15
– 5V
10µF
µP CONTROL
LINES
+
10µF
0.1µF
1410 TA01
5V
0.1µF
Effective Bits and Signal-to-(Noise + Distortion)
vs Input Frequency
12
10 NYQUIST
8
74
68
62
56
50
6
4
2
fSAMPLE = 1.25MHz
0
1k 10k 100k
1M
INPUT FREQUENCY (Hz)
10M
LTC1410 • TA02
1
1 page  
LTC1410
TYPICAL PERFORMANCE CHARACTERISTICS
S/(N + D) vs Input Frequency
and Amplitude
80
70 VIN = 0dB
60
VIN = –20dB
50
40
30
20 VIN = –60dB
10
fSAMPLE = 1.25MHz
0
1k 10k 100k 1M
INPUT FREQUENCY (Hz)
10M
1410 G01
Spurious-Free Dynamic Range vs
Input Frequency
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
10k
100k 1M
INPUT FREQUENCY (Hz)
10M
1410 G04
Integral Nonlinearity vs
Output Code
1.0
0.5
0
–0.5
–1.0
0
512 1024 1536 2048 2560 3072 3504 4096
OUTPUT CODE
1410 G07
Signal-to-Noise Ratio vs
Input Frequency
80
70
60
50
40
30
20
10
0
1k 10k 100k 1M 10M
INPUT FREQUENCY (Hz)
1410 G02
Intermodulation Distortion Plot
0
fSAMPLE = 1.25MHz
–20
fIN1 = 88.19580078kHz
fIN2 = 111.9995117kHz
–40
–60
–80
–100
–120
0
100 200 300 400 500
FREQUENCY (kHz)
Power Supply Feedthrough
vs Ripple Frequency
0
VRIPPLE = 0.1V
–20
600
1410 G05
–40
–60
–80
–100
VSS
VDD
DGND
–120
1k
10k 100k
1M
RIPPLE FREQUENCY (Hz)
10M
1410 G08
Distortion vs Input Frequency
0
–10
–20
–30
–40
–50
–60 3RD THD
–70
–80 2ND
–90
–100
1k
10k 100k 1M
INPUT FREQUENCY (Hz)
10M
1410 G03
Differential Nonlinearity vs
Output Code
1.0
0.5
0
–0.5
–1.0
0
512 1024 1536 2048 2560 3072 3504 4096
OUTPUT CODE
1410 G06
Input Common Mode Rejection
vs Input Frequency
80
70
60
50
40
30
20
10
0
1k 10k 100k 1M 10M
INPUT FREQUENCY (Hz)
1410 G09
5
5 Page 
LTC1410
APPLICATIONS INFORMATION
easily overdriven in applications where an external refer-
ence is required. The reference amplifier provides buffer-
ing between the internal reference and the capacitive DAC.
The reference amplifier compensation pin REFCOMP
(Pin 4), must be bypassed with a capacitor to ground. The
reference amplifier is stable with capacitors of 1µF or
greater. For the best noise performance, a 10µF tantalum
in parallel with 0.1µF ceramic is recommended.
The VREF pin can be driven with an external reference
(Figure 8b), a DAC or other means to provide input span
adjustment. The VREF should be kept in the range of 2.25V
to 2.75V for specified linearity.
5V
VIN
LT1019A-2.5
VOUT
ANALOG
INPUT
1
+AIN
2
–AIN
3
VREF
10µF
4
0.1µF 5
REFCOMP
AGND
LTC1410
1410 F08b
Figure 8b. Using the LT1019-2.5 as an External Reference
Full-Scale and Offset Adjustment
Figure 9 shows the ideal input/output characteristics for
the LTC1410. The code transitions occur midway between
successive integer LSB values (i.e., – FS + 0.5LSB,
– FS + 1.5LSB, – FS + 2.5LSB, . . . FS – 1.5LSB,
FS – 0.5LSB).The output is two’s complement binary
with 1LSB = [(+FS) – (– FS)]/4096 = 5V/4096 = 1.22mV.
In applications where absolute accuracy is important,
offset and full-scale errors can be adjusted to zero. Offset
error must be adjusted before full-scale error. Figure 10
shows the extra components required for full-scale error
adjustment. Zero offset is achieved by adjusting the offset
applied to the – AIN input. For zero offset error apply
– 0.61mV (i.e., – 0.5LSB) at +AIN and adjust the offset at
the – AIN input until the output code flickers between 0000
0000 0000 and 1111 1111 1111. For full-scale adjust-
ment, an input voltage of 2.49817V (FS – 1.5LSBs) is
applied to AIN and R2 is adjusted until the output code
flickers between 0111 1111 1110 and 0111 1111 1111.
011...111
011...110
000...001
000...000
111...111
111...110
BIPOLAR
ZERO
100...001
100...000
FS = 2.5V
1LSB = 2FS
4096
–1 0V 1
–FS
LSB LSB
FS – LSB
INPUT VOLTAGE, (+AIN) – (–AIN) (V)
1410 F09
Figure 9. LTC1410 Transfer Characteristics
– 5V
R1
50k
ANALOG
R3 INPUT
47k
R4
100Ω
R5 R2
47k 50k
R6
24k
10µF
0.1µF
1 +AIN
2 –AIN
3 VREF
4
REFCOMP
5 AGND
LTC1410
1410 F10
Figure 10. Offset and Full-Scale Adjust Circuit
BOARD LAYOUT AND BYPASSING
Wire wrap boards are not recommended for high resolu-
tion or high speed A/D converters. To obtain the best
performance from the LTC1410, a printed circuit board
with ground plane is required. Layout for the printed
circuit board should ensure that digital and analog signal
lines are separated as much as possible. Particular care
should be taken not to run any digital track alongside an
analog signal track or underneath the ADC. The analog
input should be screened by AGND.
11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet LTC1410I.PDF ] | |
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